Patents by Inventor Sanghoon MYUNG
Sanghoon MYUNG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11982980Abstract: According to an aspect of the present inventive concept, a simulation method for a semiconductor fabrication process includes obtaining, as input data, process parameters for controlling a semiconductor process of manufacturing semiconductor devices, or design parameters representing a structure of the semiconductor devices, or both the process parameters and the design parameters; generating predictive data for electrical characteristics of the semiconductor devices using a machine learning model based on the input data; generating reference data for the electrical characteristics of the semiconductor devices using a simulation tool based on the input data; and training the machine learning model using the predictive data and the reference data.Type: GrantFiled: April 14, 2021Date of Patent: May 14, 2024Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Jinwoo Kim, Sanghoon Myung, Wonik Jang, Yongwoo Jeon, Kanghyun Baek, Jisu Ryu, Changwook Jeong
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Patent number: 11886783Abstract: Provided is a simulation method performed by a process simulator, implemented with a recurrent neural network (RNN) including a plurality of process emulation cells, which are arranged in time series and configured to train and predict, based on a final target profile, a profile of each process step included in a semiconductor manufacturing process. The simulation method includes: receiving, at a first process emulation cell, a previous output profile provided at a previous process step, a target profile and process condition information of a current process step; and generating, at the first process emulation cell, a current output profile corresponding to the current process step, based on the target profile, the process condition information, and prior knowledge information, the prior knowledge information defining a time series causal relationship between the previous process step and the current process step.Type: GrantFiled: January 12, 2023Date of Patent: January 30, 2024Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Sanghoon Myung, Hyunjae Jang, In Huh, Hyeon Kyun Noh, Min-Chul Park, Changwook Jeong
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Patent number: 11775840Abstract: A non-transitory computer-readable medium storing a program code including an image generation model, which when executed, causes a processor to input input data including sampling data of some of a plurality of semiconductor dies of a wafer to a generator network of the image generation model and output a wafer map indicating the plurality of semiconductor dies, and to input the wafer map output from the generator network to a discriminator network of the image generation model and discriminate the wafer map.Type: GrantFiled: June 23, 2020Date of Patent: October 3, 2023Assignee: Samsung Electronics Co., Ltd.Inventors: Wonik Jang, Sanghoon Myung, Changwook Jeong, Sunghee Lee
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Publication number: 20230169240Abstract: A method of generating optimal input data for a design simulator providing output data related to output parameters in response to input data related to input parameters. The method includes; generating training data including sample input data and sample output data, selecting at least one essential input parameter affecting a plurality of output parameters from among the input parameters in accordance with an estimation model trained using the training data, and generating the optimal input data in accordance with essential input data corresponding to the at least one essential input parameter and the sample output data.Type: ApplicationFiled: November 25, 2022Publication date: June 1, 2023Inventors: JINWOO KIM, BYOUNGSEON CHOI, YUNJUN NAM, SANGHOON MYUNG, JAESIK AN, JISU RYU, CHANGWOOK JEONG, JAEMYUNG CHOE
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Publication number: 20230142367Abstract: Provided is a simulation method performed by a process simulator, implemented with a recurrent neural network (RNN) including a plurality of process emulation cells, which are arranged in time series and configured to train and predict, based on a final target profile, a profile of each process step included in a semiconductor manufacturing process. The simulation method includes: receiving, at a first process emulation cell, a previous output profile provided at a previous process step, a target profile and process condition information of a current process step; and generating, at the first process emulation cell, a current output profile corresponding to the current process step, based on the target profile, the process condition information, and prior knowledge information, the prior knowledge information defining a time series causal relationship between the previous process step and the current process step.Type: ApplicationFiled: January 12, 2023Publication date: May 11, 2023Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: Sanghoon MYUNG, Hyunjae Jang, In Huh, Hyeon Kyun Noh, Min-Chul Park, Changwook Jeong
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Publication number: 20230136021Abstract: A three-dimensional (3D) modeling method includes obtaining geometric data representing a 3D structure and input parameters including factors determining an attribute of the 3D structure, generating grid data from the geometric data, sequentially generating at least one piece of down-sampled data from the grid data, pre-processing the input parameters to generate a 3D feature map, and generating attribute profile data, representing a profile of the attribute in the 3D structure, from the at least one piece of down-sampled grid data and the 3D feature map based on at least one machine learning model respectively corresponding to at least one stage.Type: ApplicationFiled: October 25, 2022Publication date: May 4, 2023Inventors: SANGHOON MYUNG, WONIK JANG, CHANGWOOK JEONG, JAEMYUNG CHOE
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Patent number: 11574095Abstract: Provided is a simulation method performed by a process simulator, implemented with a recurrent neural network (RNN) including a plurality of process emulation cells, which are arranged in time series and configured to train and predict, based on a final target profile, a profile of each process step included in a semiconductor manufacturing process. The simulation method includes: receiving, at a first process emulation cell, a previous output profile provided at a previous process step, a target profile and process condition information of a current process step; and generating, at the first process emulation cell, a current output profile corresponding to the current process step, based on the target profile, the process condition information, and prior knowledge information, the prior knowledge information defining a time series causal relationship between the previous process step and the current process step.Type: GrantFiled: June 19, 2020Date of Patent: February 7, 2023Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Sanghoon Myung, Hyunjae Jang, In Huh, Hyeon Kyun Noh, Min-Chul Park, Changwook Jeong
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Publication number: 20230025626Abstract: A method of generating a simulation model based on simulation data and measurement data of a target includes classifying weight parameters, included in a pre-learning model learned based on the simulation data, as a first weight group and a second weight group based on a degree of significance, retraining the first weight group of the pre-learning model based on the simulation data, and training the second weight group of a transfer learning model based on the measurement data, wherein the transfer learning model includes the first weight group of the pre-learning model retrained based on the simulation data.Type: ApplicationFiled: June 28, 2022Publication date: January 26, 2023Inventors: SANGHOON MYUNG, HYOWON MOON, YONGWOO JEON, CHANGWOOK JEONG, JAEMYUNG CHOE
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Publication number: 20220043405Abstract: According to an aspect of the present inventive concept, a simulation method for a semiconductor fabrication process includes obtaining, as input data, process parameters for controlling a semiconductor process of manufacturing semiconductor devices, or design parameters representing a structure of the semiconductor devices, or both the process parameters and the design parameters; generating predictive data for electrical characteristics of the semiconductor devices using a machine learning model based on the input data; generating reference data for the electrical characteristics of the semiconductor devices using a simulation tool based on the input data; and training the machine learning model using the predictive data and the reference data.Type: ApplicationFiled: April 14, 2021Publication date: February 10, 2022Inventors: Jinwoo Kim, Sanghoon Myung, Wonik Jang, Yongwoo Jeon, Kanghyun Baek, Jisu Ryu, Changwook Jeong
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Publication number: 20210174201Abstract: A computing device includes memory storing computer-executable instructions; and processing circuitry configured to execute the computer-executable instructions such that the processing circuitry is configured to operate as a machine learning generator configured to receive semiconductor process parameters, to generate semiconductor process result information from the semiconductor process parameters, and to output the generated semiconductor process result information; and operate as a machine learning discriminator configured to receive the generated semiconductor process result information from the machine learning generator and to discriminate whether the generated semiconductor process result information is true.Type: ApplicationFiled: June 22, 2020Publication date: June 10, 2021Applicant: Samsung Electronics Co., Ltd.Inventors: In HUH, Sanghoon MYUNG, Wonik JANG, Changwook JEONG
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Publication number: 20210158152Abstract: Provided is a simulation method performed by a process simulator, implemented with a recurrent neural network (RNN) including a plurality of process emulation cells, which are arranged in time series and configured to train and predict, based on a final target profile, a profile of each process step included in a semiconductor manufacturing process. The simulation method includes: receiving, at a first process emulation cell, a previous output profile provided at a previous process step, a target profile and process condition information of a current process step; and generating, at the first process emulation cell, a current output profile corresponding to the current process step, based on the target profile, the process condition information, and prior knowledge information, the prior knowledge information defining a time series causal relationship between the previous process step and the current process step.Type: ApplicationFiled: June 19, 2020Publication date: May 27, 2021Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: Sanghoon MYUNG, Hyunjae Jang, In Huh, Hyeon Kyun Noh, Min-chul Park, Changwook Jeong
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Publication number: 20210158173Abstract: A non-transitory computer-readable medium storing a program code including an image generation model, which when executed, causes a processor to input input data including sampling data of some of a plurality of semiconductor dies of a wafer to a generator network of the image generation model and output a wafer map indicating the plurality of semiconductor dies, and to input the wafer map output from the generator network to a discriminator network of the image generation model and discriminate the wafer map.Type: ApplicationFiled: June 23, 2020Publication date: May 27, 2021Applicant: Samsung Electronics Co., Ltd.Inventors: Wonik JANG, Sanghoon MYUNG, Changwook JEONG, Sunghee LEE
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Publication number: 20210056425Abstract: A method for a hybrid model that includes a machine learning model and a rule-based model, includes obtaining a first output from the rule-based model by providing a first input to the rule-based model, and obtaining a second output from the machine learning model by providing the first input, a second input, and the obtained first output to the machine learning model. The method further includes training the machine learning model, based on errors of the obtained second output.Type: ApplicationFiled: June 24, 2020Publication date: February 25, 2021Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: Changwook JEONG, Sanghoon Myung, In Huh, Hyeonkyun Noh, Minchul Park, Hyunjae Jang
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Patent number: 10650910Abstract: A fault analysis method of a semiconductor fault analysis device is provided. The fault analysis method includes: receiving measurement data measured corresponding to a semiconductor device; generating double sampling data based on the measurement data and reference data; performing a fault analysis operation with respect to the double sampling data; classifying a fault type of the semiconductor device based on a result of the fault analysis operation; and outputting information about the fault type.Type: GrantFiled: January 16, 2019Date of Patent: May 12, 2020Assignee: SAMSUNG ELECTRONICS CO., LTD.Inventors: Changwook Jeong, Sanghoon Myung, Min-Chul Park, Jeonghoon Ko, Jisu Ryu, Hyunjae Jang, Hyungtae Kim, Yunrong Li, Min Chul Jeon
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Publication number: 20190385695Abstract: A fault analysis method of a semiconductor fault analysis device is provided. The fault analysis method includes: receiving measurement data measured corresponding to a semiconductor device; generating double sampling data based on the measurement data and reference data; performing a fault analysis operation with respect to the double sampling data; classifying a fault type of the semiconductor device based on a result of the fault analysis operation; and outputting information about the fault type.Type: ApplicationFiled: January 16, 2019Publication date: December 19, 2019Applicant: SAMSUNG ELECTRONICS CO., LTD.Inventors: Changwook JEONG, Sanghoon MYUNG, Min-Chul PARK, Jeonghoon KO, Jisu RYU, Hyunjae JANG, Hyungtae KIM, Yunrong LI, Min Chul JEON