Patents by Inventor Sang-hyeon Lee
Sang-hyeon Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11961223Abstract: An apparatus for predicting performance of a wheel in a vehicle: includes a learning device that generates a latent space for a plurality of two-dimensional (2D) wheel images based on a convolutional autoencoder (CAE), extracts a predetermined number of the plurality of 2D wheel images from the latent space, and learns a dataset having the plurality of 2D wheel images and performance values corresponding to the plurality of 2D wheel images; and a controller that predicts performance for the plurality of 2D wheel images based on a performance prediction model obtained by the learning device.Type: GrantFiled: April 20, 2021Date of Patent: April 16, 2024Assignees: HYUNDAI MOTOR COMPANY, KIA CORPORATION, SOOKMYUNG WOMEN'S UNIVERSITY INDUSTRY-ACADEMIC COOPERATION FOUNDATIONInventors: Jong Ho Park, Chang Gon Kim, Chul Woo Jung, Sang Min Lee, Min Kyoo Kang, Ji Un Lee, Kwang Hyeon Hwang, Nam Woo Kang, So Young Yoo, Seong Sin Kim, Sung Hee Lee
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Publication number: 20240118607Abstract: The inventive concept provides a substrate treating method. The substrate treating method includes pre-treating a substrate by cleaning the substrate; etching the substrate by supplying an etchant and heating a substrate supplied with the etchant; and post-treating the substrate after the etching the substrate, and wherein the pre-treating the substrate, the etching the substrate, and the post-treating the substrate are each performed in different chambers, a substrate on which the pre-treating the substrate is completed is transferred in a dry state to a chamber at which the etching the substrate is performed, and a substrate on which the etching the substrate is completed is transferred in a wetted state with a liquid to a chamber at which the post-treating the substrate is performed.Type: ApplicationFiled: March 14, 2023Publication date: April 11, 2024Applicant: SEMES CO.,LTD.Inventors: Hyun YOON, Ki Hoon CHOI, Seung Un OH, Young Ho PARK, Sang Hyeon RYU, Tae Hee KIM, Sang Gun LEE
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Patent number: 11950506Abstract: The present disclosure relates to a plurality of host materials comprising a first host material comprising a compound represented by formula 1, and a second host material comprising a compound represented by formula 2, and an organic electroluminescent device comprising the same. By comprising a specific combination of compounds as host materials, it is possible to provide an organic electroluminescent device having lower driving voltage, higher luminous efficiency, higher power efficiency, and/or superior lifespan characteristics compared to conventional organic electroluminescent devices.Type: GrantFiled: October 20, 2020Date of Patent: April 2, 2024Assignee: Rohm and Haas Electronic Materials Korea Ltd.Inventors: So-Young Jung, Su-Hyun Lee, Mi-Ja Lee, Sang-Hee Cho, Doo-Hyeon Moon
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Patent number: 11945916Abstract: The present invention relates to a fatty acid amide-based oleogel containing polymer and a method for preparing same and, more particularly, to a fatty acid amide-based oleogel containing polymer and a method for preparing same, the oleogel comprising: a substrate formed of a polymer of a fatty acid amide having a single double bond and a silicone polymer, or a composition comprising same; and an oleogel surface formed by impregnating the substrate with oil, wherein, in the silicone polymer, first silyl-terminated polydialkylsiloxane is crosslinked with second vinyl-terminated polydialkylsiloxane, and the fatty acid amide is linked to the first silyl-terminated polydialkylsiloxane. Also, the present invention can provide use of the fatty acid amide-based oleogel containing polymer according to the present invention.Type: GrantFiled: December 4, 2020Date of Patent: April 2, 2024Assignee: POSTECH RESEARCH AND BUSINESS DEVELOPMENT FOUNDATIONInventors: Sang Joon Lee, Jae Hyeon Lee
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Publication number: 20240104195Abstract: Disclosed herein are an apparatus and method for updating an Internet-based malware detection engine using virtual machine scaling. The method may include creating a scaling group and an update group set based on a first virtual machine image, creating a second virtual machine image for a running virtual machine in response to occurrence of a snapshot event in the virtual update group run based on the first virtual machine image, modifying the scale-out image of the scaling group to the second virtual machine image, updating the scaling group by triggering a scale-out event and a scale-in event in the scaling group in response to occurrence of an update event, and modifying the scale-in image of the scaling group to the second virtual machine image.Type: ApplicationFiled: June 15, 2023Publication date: March 28, 2024Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTEInventors: Sang-Min LEE, Ki-Jong KOO, Jung-Tae KIM, Ji-Hyeon SONG, Jong-Hyun KIM, Dae-Sung MOON
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Publication number: 20240097119Abstract: A method of manufacturing a composite electrode for an all-solid-state battery includes: preparing a precursor solution by mixing at least one solid electrolyte precursor and at least one polar solvent; stirring the precursor solution; preparing an electrode slurry by adding an active material to the stirred precursor solution; and heat-treating the electrode slurry and obtaining the composite electrode for the all-solid-state battery, wherein the composite electrode for the all-solid-state battery includes: the active material; and a coating layer disposed on the active material and including a solid electrolyte.Type: ApplicationFiled: November 29, 2023Publication date: March 21, 2024Applicants: HYUNDAI MOTOR COMPANY, Kia CorporationInventors: Sun Ho CHOI, Yong Jun JANG, In Woo SONG, Sang Heon LEE, Sang Soo LEE, So Young KIM, Seong Hyeon CHOI, Sa Heum KIM, Jae Min LIM
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Patent number: 11919999Abstract: Provided are a method for preparing a polyetherketoneketone and a polyetherketoneketone prepared thereby, wherein, at the time of a polymerization reaction, nitrogen gas is blown into a liquid reaction medium while stirring, thereby quickly removing hydrochloric acid, which is a by-product generated during the reaction, and preventing aggregation of resin particles, thus suppressing the generation of scales.Type: GrantFiled: November 16, 2018Date of Patent: March 5, 2024Assignee: HANWHA CHEMICAL CORPORATIONInventors: Kwang Seok Jeong, Min Sung Kim, Jae Heon Kim, Ju Young Park, Cho Hee Ahn, Byeong Hyeon Lee, Sang Hyun Cho
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Publication number: 20230260863Abstract: In one example, a semiconductor package comprises a substrate having a top surface and a bottom surface, an electronic device mounted on the top surface of the substrate and coupled to one or more interconnects on the bottom surface of the substrate, a cover over the electronic device, a casing around a periphery of the cover, and an encapsulant between the cover and the casing and the substrate.Type: ApplicationFiled: April 26, 2023Publication date: August 17, 2023Applicant: Amkor Technology Singapore Holding Pte. Ltd.Inventors: Se Man Oh, Kyoung Yeon Lee, Sang Hyeon Lee, Min Cheol Shin
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Patent number: 11664289Abstract: In one example, a semiconductor package comprises a substrate having a top surface and a bottom surface, an electronic device mounted on the top surface of the substrate and coupled to one or more interconnects on the bottom surface of the substrate, a cover over the electronic device, a casing around a periphery of the cover, and an encapsulant between the cover and the casing and the substrate.Type: GrantFiled: October 27, 2020Date of Patent: May 30, 2023Assignee: Amkor Technology Singapore Holding Pte. Ltd.Inventors: Se Man Oh, Kyoung Yeon Lee, Sang Hyeon Lee, Min Cheol Shin
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Publication number: 20230122379Abstract: A semiconductor device includes an active pattern with a lower pattern and sheet patterns spaced apart from the lower pattern, a gate structure on the lower pattern and having a gate electrode and a gate insulating film that surround each of the sheet patterns, a gate capping pattern on the gate structure, a gate etching stop pattern between the gate capping pattern and the gate structure, a gate spacer along a sidewall of the gate capping pattern, a source/drain pattern on the gate structure, a gate contact through the gate capping pattern and connected to the gate electrode, upper surfaces of the gate contact and gate spacer being coplanar, and a source/drain contact on the source/drain pattern and connected to the source/drain pattern.Type: ApplicationFiled: August 2, 2022Publication date: April 20, 2023Inventors: Shin Cheol MIN, Keon Yong CHEON, Myung Dong KO, Yong Hee PARK, Sang Hyeon LEE, Dong Won KIM, Woo Seung SHIN, Hyung Suk LEE
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Patent number: 11597225Abstract: The present invention relates to silver ink for printing a three dimensional microstructure and a 3D printing method using the same. The present invention provides a method for printing a 3-dimensional silver structure pattern, the method including: a step of providing a nozzle with liquid ink including capped silver nanoparticles and exhibiting Newtonian fluid behavior; a step of forming, at a predetermined point on a substrate, a meniscus of the liquid ink with ink extruded from the nozzle; a step of allowing the ink of the nozzle to be extruded by means of the surface tension of the meniscus while moving the nozzle along a path in a direction perpendicular to the substrate, in a direction parallel to the substrate, or according to a combination of said directions; and a step of forming a silver structure pattern corresponding to the movement path of the nozzle by evaporating a solvent from the extruded ink from the region closer to the substrate.Type: GrantFiled: April 26, 2018Date of Patent: March 7, 2023Assignee: KOREA ELECTROTECHNOLOGY RESEARCH INSTITUTEInventors: Seung Kwon Seol, Sang Hyeon Lee, Won Suk Chang
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Publication number: 20230019860Abstract: A semiconductor device including a substrate; first and second active patterns on the substrate, extending in a first direction and spaced apart in a second direction; gate electrodes on the first and second active patterns and extending in the second direction; a first gate separation structure between the first and second active patterns, extending in the first direction, and separating the gate electrodes; and a first element separation structure between the gate electrodes, extending in the second direction, and separating the second active pattern, wherein a distance to a first side of a first portion of the first gate separation structure is smaller than a distance to the first side of a second portion of the first gate separation structure, and a distance to the second side of the first portion is smaller than a distance from the second active pattern to the second side of the second portion.Type: ApplicationFiled: April 12, 2022Publication date: January 19, 2023Inventors: Myung-Dong KO, Keon Yong CHEON, Dong Won KIM, Hyun Suk KIM, Sang Hyeon LEE, Hyung Suk LEE
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Patent number: 11493388Abstract: An on-chip temperature sensor for generating a digital output signal representing a temperature value includes: a proportional to absolute temperature (PTAT) buffer for alternately generating a first voltage signal representing a first temperature of the PTAT buffer and a second voltage signal representing a second temperature of the PTAT buffer; an analog to digital (A/D) converter, coupled to the PTAT buffer, for converting the first voltage signal to a first digital voltage signal and for converting the second voltage signal to a second digital voltage signal; and a digital output generating block, for receiving the first digital voltage signal and the second digital voltage signal, and comparing a difference between the first digital voltage signal and the second digital voltage signal with a digital voltage reference signal to generate the digital output signal.Type: GrantFiled: October 15, 2020Date of Patent: November 8, 2022Assignee: Himax Imaging LimitedInventors: Sang Hyeon Lee, Hack soo Oh
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Publication number: 20220120620Abstract: An on-chip temperature sensor for generating a digital output signal representing a temperature value includes: a proportional to absolute temperature (PTAT) buffer for alternately generating a first voltage signal representing a first temperature of the PTAT buffer and a second voltage signal representing a second temperature of the PTAT buffer; an analog to digital (A/D) converter, coupled to the PTAT buffer, for converting the first voltage signal to a first digital voltage signal and for converting the second voltage signal to a second digital voltage signal; and a digital output generating block, for receiving the first digital voltage signal and the second digital voltage signal, and comparing a difference between the first digital voltage signal and the second digital voltage signal with a digital voltage reference signal to generate the digital output signal.Type: ApplicationFiled: October 15, 2020Publication date: April 21, 2022Inventors: Sang Hyeon Lee, Hack soo Oh
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Publication number: 20210340397Abstract: A catalyst ink for plating and a method for electrochemically manufacturing an electronic device by using same are disclosed. The present invention provides a catalyst ink for plating, comprising: a polymer binder; a metal ion as a catalyst; a silane coupling agent for coupling the metal ion and the polymer; and a solvent, wherein the polymer has a lower critical solution temperature in the temperature-composition phase diagram for a solvent-polymer binary system, and the lower critical solution temperature is 30° C. or higher. According to the present invention, a high resolution plated pattern having a line width and a width between lines can be manufactured.Type: ApplicationFiled: October 26, 2018Publication date: November 4, 2021Inventors: Seung Kwon SEOL, Sang Hyeon LEE, Won Suk CHANG, Jae Yeon PYO
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Publication number: 20210111085Abstract: In one example, a semiconductor package comprises a substrate having a top surface and a bottom surface, an electronic device mounted on the top surface of the substrate and coupled to one or more interconnects on the bottom surface of the substrate, a cover over the electronic device, a casing around a periphery of the cover, and an encapsulant between the cover and the casing and the substrate.Type: ApplicationFiled: October 27, 2020Publication date: April 15, 2021Applicant: Amkor Technology Singapore Holding Pte. Ltd.Inventors: Se Man Oh, Kyoung Yeon Lee, Sang Hyeon Lee, Min Cheol Shin
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Patent number: 10818569Abstract: In one example, a semiconductor package comprises a substrate having a top surface and a bottom surface, an electronic device mounted on the top surface of the substrate and coupled to one or more interconnects on the bottom surface of the substrate, a cover over the electronic device, a casing around a periphery of the cover, and an encapsulant between the cover and the casing and the substrate.Type: GrantFiled: December 4, 2018Date of Patent: October 27, 2020Assignee: Amkor Technology Singapore Holding Pte. Ltd.Inventors: Se Man Oh, Kyoung Yeon Lee, Sang Hyeon Lee, Min Cheol Shin
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Publication number: 20200207132Abstract: The present invention relates to silver ink for printing a three dimensional microstructure and a 3D printing method using the same. The present invention provides a method for printing a 3-dimensional silver structure pattern, the method including: a step of providing a nozzle with liquid ink including capped silver nanoparticles and exhibiting Newtonian fluid behavior; a step of forming, at a predetermined point on a substrate, a meniscus of the liquid ink with ink extruded from the nozzle; a step of allowing the ink of the nozzle to be extruded by means of the surface tension of the meniscus while moving the nozzle along a path in a direction perpendicular to the substrate, in a direction parallel to the substrate, or according to a combination of said directions; and a step of forming a silver structure pattern corresponding to the movement path of the nozzle by evaporating a solvent from the extruded ink from the region closer to the substrate.Type: ApplicationFiled: April 26, 2018Publication date: July 2, 2020Inventors: Seung Kwon SEOL, Sang Hyeon LEE, Won Suk CHANG
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Publication number: 20200176345Abstract: In one example, a semiconductor package comprises a substrate having a top surface and a bottom surface, an electronic device mounted on the top surface of the substrate and coupled to one or more interconnects on the bottom surface of the substrate, a cover over the electronic device, a casing around a periphery of the cover, and an encapsulant between the cover and the casing and the substrate.Type: ApplicationFiled: December 4, 2018Publication date: June 4, 2020Applicant: AMKOR TECHNOLOGY KOREA, INC.Inventors: Se Man Oh, Kyoung Yeon Lee, Sang Hyeon Lee, Min Cheol Shin
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Patent number: 10471502Abstract: A continuous casting and rolling apparatus according to one embodiment of the present invention provides: a continuous caster for generating a steel sheet; a first rolling unit associated with the continuous caster; and a second rolling unit which is spaced apart in the outlet of the first rolling unit and comprises: a rolling mill for pressing down the steel sheet; and a cutter for cutting a portion of the steel sheet, wherein the cutter is spaced from the second rolling unit by a length corresponding to the length of the steel sheet discharged in an at least discontinuous rolling mode, and may comprise a cut withdrawal unit provided between the first rolling unit and the second rolling unit.Type: GrantFiled: December 2, 2014Date of Patent: November 12, 2019Assignee: POSCOInventors: Seong-Yeon Kim, Young-Ju Ko, Il-Sin Bae, Choong-Yun Lee, In-Jae Lee, Jea-Sook Chung, Sang-Hyeon Lee