Abstract: Methods for forming capacitor of FeRAM are disclosed. The disclosed methods can prevent the step difference from an etch-back process and scratch on a Pt layer in a CMP process using a basic slurry by performing a CMP process using an acidic slurry including an organic acid when isolating a storage electrode in a formation process of a FeRAM capacitor.

Abstract: A nitride CMP slurry having selectivity to nitride over oxide. The slurry increases the polishing speed of a nitride film by varying the pH of the slurry, and polishes the nitride film faster than an oxide film by decreasing the polishing speed of the oxide film. As a result, the slurry provides a CMP process for manufacturing a high density and highly integrated semiconductor device and a structural development of new concept device.

Abstract: CMP slurries for oxide film and a method for forming a metal line contact plug of a semiconductor device are described herein. When a polishing process of a multi-layer film is performed by using the disclosed CMP slurry for oxide film including an HXOn compound (wherein n is an integer from 1 to 4), a stable landing plug poly can be formed by preventing step differences by reducing interlayer polishing speed differences.

Abstract: A method for manufacturing a contact plug of a semiconductor device is disclosed. A CMP process is performed on an interlayer insulating film and a polysilicon layer using a disclosed acidic CMP slurry containing an oxidizer, thereby minimizing dishing phenomenon of the interlayer insulating film and the polysilicon layer. Accordingly, the degradation of characteristics of a device can be prevented, which results in improvement of characteristics and reliability of a semiconductor device to manufacture a highly integrated semiconductor device.

Abstract: The present invention relates to a polishing pad for the chemical mechanical polishing (CMP). According to the present invention, there is provided a chemical mechanical polishing pad for polishing a semiconductor wafer with chemicals containing predetermined components supplied between the semiconductor wafer and the polishing pad, comprising a base layer; and an abrasive layer which contains polishing abrasives capsulated with a material soluble in the chemicals and is formed to have a constant thickness on the top surface of the base layer. The capsulated polishing abrasives become free abrasives in the chemicals supplied upon polishing, and take part in the polishing. Capsulating the polishing abrasives can be performed by granulization or spraying. According to the polishing pad of the present invention, planarization polishing can be performed as whole. In addition, since a small amount of chemicals are used, it is advantageous in the economic and environmental aspects.

Abstract: Method of forming flash memory device is disclosed, more particularly, method of forming self-aligned floating gate by performing Chemical Mechanical Polishing (abbreviated as “CMP”) process using slurry having higher polishing selectivity to oxide films than to nitride films and slurry having higher polishing selectivity to polysilicon than to oxide films.

Abstract: A chemical mechanical polishing(abbreviated as “CMP”) slurry composition for oxide films, and a method of forming a self-aligned floating gate of a flash memory device are disclosed for performing a CMP process using slurry having higher polishing selectivity to an oxide film than to a nitride film which is an etching barrier film.

Abstract: A chemical mechanical polishing (hereinafter, referred to as ‘CMP’) slurry for metal is disclosed, more specifically, method for manufacturing metal line contact plug of semiconductor device using an acidic CMP slurry for oxide film further comprising an oxidizer and a complexing agent, which polishes a metal, an oxide film and a nitride film at a similar speed, thereby easily separates a metal line contact plug.

Abstract: A chemical mechanical polishing (CMP) slurry for applying onto a complex structure consisting of two or more among a metal film, a nitride film and an oxide film and a method for manufacturing a metal line contact plug of a semiconductor device using the slurry. During a CMP process to form a metal line contact plug, an acidic CMP slurry having similar polishing speeds of metal films, oxide films and nitride films and not containing an oxidizer is used. As a result, a metal line contact plug can be easily separated using an acidic CMP slurry without any oxidizer.

Abstract: A nitride CMP slurry having selectivity to nitride over oxide. The slurry increases the polishing speed of a nitride film by varying the pH of the slurry, and polishes the nitride film faster than an oxide film by decreasing the polishing speed of the oxide film. As a result, the slurry provides a CMP process for manufacturing a high density and highly integrated semiconductor device and a structural development of new concept device.

Abstract: The present invention discloses methods for fabricating a semiconductor device. A gate electrode having a hard mask layer at its upper portion is formed, and an interlayer insulating film is formed over the resultant structure. A landing plug contact hole is formed by etching the interlayer insulating film, and a conductive layer is formed over the resultant structure, filling up the landing plug contact hole. A first CMP process is performed to expose the hard mask layer, and a second CMP process is preformed to planarize the hard mask layer, the interlayer insulating film and the landing plug conductive layer. The CMP processes of the present invention reduce or prevent dishing of the mask insulating film or contact plug, to reduce or prevent the likelihood of a bridge forming between adjacent conductive plugs. As a result, the semiconductor device has improved properties and/or improved yield.

Abstract: A CMP slurry for ruthenium titanium nitride and a polishing process using the same. In a process technology below 0.1 &mgr;m, when a capacitor using a (Ba1−xSrx)TiO3 film as a dielectric film is fabricated, the slurry is used to polish a ruthenium titanium nitride film deposited as a barrier film according to a CMP process. The CMP process is performed by using the slurry, to improve a polishing speed of ruthenium titanium nitride under a low polishing pressure. In addition, the CMP process is performed according to an one-step process by using one kind of slurry. As a result, defects on an insulating film are reduced and a polishing property is improved, thereby simplifying the CMP process.

Abstract: A CMP slurry for ruthenium and a polishing process using the same. In a process technology below 0.1 &mgr;m, when a capacitor using a (Ba1−xSrx)TiO3 film as a dielectric film is fabricated, the slurry is used to polish a ruthenium film deposited as a lower electrode according to a CMP process. The CMP process is performed by using the slurry, to improve a polishing speed of ruthenium under a low polishing pressure. In addition, the CMP process is performed according to an one-step process by using one kind of slurry. As a result, defects on an insulating film are reduced and a polishing property is improved, thereby simplifying the CMP process.

Abstract: A method of forming a gate in a semiconductor device includes forming a dummy gate insulating layer on a semiconductor substrate having a field oxide layer isolating the device, depositing a dummy gate polysilicon layer and a hard mask layer on the dummy gate insulating layer sequentially, patterning the hard mask layer into a mask pattern and patterning the dummy gate polysilicon layer using the mask pattern as an etch barrier, forming spacers at both sidewalls of the dummy gate polysilicon layer, depositing an insulating interlayer on the resultant structure after forming the spacers, exposing a surface of the dummy gate polysilicon layer by carrying out an oxide layer CMP process having a high selection ratio against the dummy gate polysilicon layer, forming a damascene structure by removing the dummy gate polysilicon layer and the dummy gate insulating layer using the insulating interlayer as another etch barrier, depositing a gate insulating layer and a gate metal layer on the entire surface of the semic

Abstract: A method for the formation of a gate electrode with a uniform thickness in the semiconductor device by using a difference in polishing selection ratio between a polymer and an oxide film.

Abstract: The present invention relates to a polishing pad for the chemical mechanical polishing (CMP). According to the present invention, there is provided a chemical mechanical polishing pad for polishing a semiconductor wafer with chemicals containing predetermined components supplied between the semiconductor wafer and the polishing pad, comprising a base layer; and an abrasive layer which contains polishing abrasives capsulated with a material soluble in the chemicals and is formed to have a constant thickness on the top surface of the base layer. The capsulated polishing abrasives become free abrasives in the chemicals supplied upon polishing, and take part in the polishing. Capsulating the polishing abrasives can be performed by granulization or spraying. According to the polishing pad of the present invention, planarization polishing can be performed as whole. In addition, since a small amount of chemicals are used, it is advantageous in the economic and environmental aspects.

Abstract: A method for the formation of a gate electrode with a uniform thickness in the semiconductor device by using a difference in polishing selection ratio between a polymer and an oxide film.