Abstract: The present invention relates to a catalyst composition and a process for preparing an olefin polymer using the same. More specifically, the present invention relates to a novel catalyst composition comprising at least two types of catalysts and a process for preparing an olefin polymer having excellent heat resistance using the same. The present invention can provide an olefin polymer having excellent activity and high heat resistance, and also can control the values of density, heat resistance and melt index (MI) of the olefin polymer.

Abstract: A display device includes: a gate line transmitting a gate line; a data line transmitting a data voltage; a first switching element and a second switching element connected to the gate line and the data line; a third switching element connected between the second switching element and a terminal providing a first reference voltage signal; a first liquid crystal capacitor connected to the first switching element; and a second liquid crystal capacitor connected to the second switching element, wherein the third switching element includes a first control terminal connected to the gate line and a second control terminal connected to a terminal providing a second reference voltage signal. The second and third switching elements are operated to form a voltage dividing network having a respective voltage dividing ratio.

Abstract: In a display panel and a display apparatus having the display panel, the display panel includes array and opposite substrates. The array substrate includes display and peripheral areas. Gate and source lines are formed in the display area. A gate driving part and first and second clock lines are formed in the peripheral area. The gate driving part outputs gate signals to the gate line. The first and second clock lines respectively transmit first and second clock signals to the gate driving part. The opposite substrate is combined with the array substrate and includes a common electrode layer. The common electrode layer has an opening portion patterned to expose the first and second clock lines. The exposed portions of the first and second clock lines have substantially the same area. Thus, delays of the gate signals may be minimized and distortion of the gate signals may be prevented.

Abstract: The present description relates to an olefin block copolymer having excellences in elasticity and heat resistance and its preparation method. The olefin block copolymer includes a plurality of blocks or segments, each of which includes an ethylene or propylene repeating unit and an ?-olefin repeating unit at different weight fractions. The olefin block copolymer has a density of 0.85 to 0.92 g/cm3, and density X (g/cm3) and TMA (Thermal Mechanical Analysis) value Y (° C.) satisfy a defined relationship.

Abstract: The present description relates to an olefin block copolymer preferably useful to form nonslip pads due to excellences in elasticity and heat resistance, and a sheet-shaped molded body comprising the olefin block copolymer The olefin block copolymer includes a plurality of blocks or segments, each of which includes an ethylene or propylene repeating unit and an ?-olefin repeating unit at different weight fractions. The olefin block copolymer satisfies a defined relationship when a load of 5 to 10 kg is applied to a sheet-shaped molded body of the block copolymer for 12 hours or longer at a temperature of 60° C. or higher, and then removed.

Abstract: The present description relates to an olefin block copolymer having excellences in elasticity, heat resistance, and processability. The olefin block copolymer includes a plurality of blocks or segments, each of which includes an ethylene or propylene repeating unit and an ?-olefin repeating unit at different weight fractions. In the olefin block copolymer, a first derivative of the number Y of short-chain branches (SCBs) per 1,000 carbon atoms of each polymer chain contained in the block copolymer with respect to the molecular weight X of the polymer chains is a negative or positive number of ?1.5×10?4 or greater; and the first derivative is from ?1.0×10?4 to 1.0×10?4 in the region corresponding to the median of the molecular weight X or above.

Abstract: A thin film transistor array panel and a manufacturing method therefor. A shorting bar for connecting a thin film transistor with data lines is formed separate from the data lines, and then the data lines and the shorting bar are connected through a connecting member. As a result, all the data lines are floated during manufacture, so that variation in etching speed between data lines does not occur. Since variation in etching speed between the data lines can be prevented, performance deterioration of the transistor caused by a thickness difference in the lower layer of the data line can be prevented, as can resulting deterioration in display quality. Also, the influence of static electricity can be reduced or eliminated. Furthermore, since the data lines and the shorting bar are connected to each other, the generation of static electricity can be prevented or reduced, and quality testing is more readily performed.

Abstract: In a display panel and a display apparatus having the display panel, the display panel includes array and opposite substrates. The array substrate includes display and peripheral areas. Gate and source lines are formed in the display area. A gate driving part and first and second clock lines are formed in the peripheral area. The gate driving part outputs gate signals to the gate line. The first and second clock lines respectively transmit first and second clock signals to the gate driving part. The opposite substrate is combined with the array substrate and includes a common electrode layer. The common electrode layer has an opening portion patterned to expose the first and second clock lines. The exposed portions of the first and second clock lines have substantially the same area. Thus, delays of the gate signals may be minimized and distortion of the gate signals may be prevented.

Abstract: A liquid crystal display according to an exemplary embodiment of the present invention includes a first substrate, a gate electrode formed on the first substrate, a gate insulating layer formed on the gate electrode, a semiconductor formed on the gate insulating layer, a source electrode and a drain electrode formed on the semiconductor, a second substrate that faces the first substrate, and a light blocking member formed on the second substrate, and the semiconductor includes a metal oxide semiconductor and the light blocking member is not formed in a region corresponding to at least a portion of the semiconductor.

Abstract: The present invention relates to a catalyst composition and a process for preparing an olefin polymer using the same. More specifically, the present invention relates to a novel catalyst composition comprising at least two types of catalysts and a process for preparing an olefin polymer having excellent heat resistance using the same. The present invention can provide an olefin polymer having excellent activity and high heat resistance, and also can control the values of density, heat resistance and melt index (MI) of the olefin polymer.

Abstract: A thin film transistor array panel and a manufacturing method therefor. A shorting bar for connecting a thin film transistor with data lines is formed separate from the data lines, and then the data lines and the shorting bar are connected through a connecting member. As a result, all the data lines are floated during manufacture, so that variation in etching speed between data lines does not occur. Since variation in etching speed between the data lines can be prevented, performance deterioration of the transistor caused by a thickness difference in the lower layer of the data line can be prevented, as can resulting deterioration in display quality. Also, the influence of static electricity can be reduced or eliminated. Furthermore, since the data lines and the shorting bar are connected to each other, the generation of static electricity can be prevented or reduced, and quality testing is more readily performed.

Abstract: The present invention relates to a display device and a manufacturing method thereof. A display device according to an exemplary embodiment of the present invention includes a substrate including a first surface and a second surface, a first line disposed on the first surface and made of a transparent metal oxide semiconductor, and a first semiconductor disposed on the first surface and made of the transparent metal oxide semiconductor.

Abstract: The present invention relates to a novel post metallocene-type ligand compound, to a metal compound containing the ligand compound, to a catalytic composition containing the metal compound, and to a method for preparing same, as well as to a method for preparing olefin polymers using the catalytic composition.

Abstract: A display device includes driving apparatus having first, second, third, and fourth gate drivers. The first and second gate drivers are connected to gate lines and are positioned on one side of the display device side by side. The third and fourth gate drivers are connected to gate lines and are positioned on the other side of the display device side by side. The first and third gate drivers apply the gate signal to the same gate line, and the second and fourth gate drivers apply the gate signal to the same gate line.

Abstract: A touch display substrate includes a first data line, a first gate line, a first pixel electrode, a second gate line, a second pixel electrode, a senor data line and a first sensor electrode. The first data line extends along a first direction. The first gate line extends along a second direction. The first pixel electrode is electrically connected to the first data line and the first gate line. The second gate line is substantially parallel with the first gate line. The second pixel electrode is adjacent to the first pixel electrode and electrically connected to the first data line and the second gate line. The sensor data line is adjacent to the second pixel electrode and substantially parallel to the first data line. The first sensor electrode is electrically connected to the sensor data line.

Abstract: A thin film transistor array panel comprises a repair line disposed in a peripheral area of a display area and being configured to repair when at least one of a gate line and a data line are disconnected, and a detour line disposed in the peripheral area and comprising at least one resistor having higher resistance than a remaining portion of the detour line, wherein both ends of the detour line are connected to the repair line to protect the array panel.

Abstract: A method of manufacturing a thin film transistor array panel is provided, which includes: forming a gate line on a substrate; depositing a gate insulating layer and a semiconductor layer in sequence on the gate line; depositing a lower conductive film and an upper conductive film on the semiconductor layer; photo-etching the upper conductive film, the lower conductive film, and the semiconductor layer; depositing a passivation layer; photo-etching the passivation layer to expose first and second portions of the upper conductive film; removing the first and the second portions of the upper conductive film to expose first and second portions of the lower conductive film; forming a pixel electrode on the first portion of the lower conductive film; removing the second portion of the lower conductive film to expose a portion of the semiconductor layer; and forming a columnar spacer on the exposed portion of the semiconductor layer.

Abstract: A method of driving gate lines is used to activate the gate lines by outputting output signals of stages to the gate lines. A first node is boosted up based upon a carry signal or the vertical start signal from a previous stage. A gate signal that is pulled up is outputted through an output terminal of a present stage based upon a first clock signal which is boosted up. An off-voltage is outputted through the output terminal of the present stage in response to an output signal from a next stage or the vertical start signal. The first node is discharged in response to the output signal from the next stage or a carry signal from a last stage. A positive ripple voltage at the first node is removed by providing a negative ripple voltage to the first node.

Abstract: A display device may include an insulating substrate, a pixel electrode formed on the insulating substrate, a circuit board connected to the insulating substrate, a first wiring connected to the circuit board, and a second wiring for transmitting a signal to the pixel electrode. The second wiring may be connected to the first wiring, and the second wiring may have a larger resistance than the first wiring. Portions of the first wiring or the second wiring may include a zigzag pattern, and a swing width of a zigzag pattern of the second wiring may be varied depending on the position of the second wiring.

Abstract: A method of driving gate lines is used to activate the gate lines by outputting output signals of stages to the gate lines. A first node is boosted up based upon a carry signal or the vertical start signal from a previous stage. A gate signal that is pulled up is outputted through an output terminal of a present stage based upon a first clock signal which is boosted up. An off-voltage is outputted through the output terminal of the present stage in response to an output signal from a next stage or the vertical start signal. The first node is discharged in response to the output signal from the next stage or a carry signal from a last stage. A positive ripple voltage at the first node is removed by providing a negative ripple voltage to the first node.