Patents by Inventor Sang-Kook Choi

Sang-Kook Choi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8164148
    Abstract: Provided are a method of generating strong spin waves, a method of simultaneously generating spin waves and electromagnetic waves, a logic operation device using spin waves, a variety of spin wave devices employing the same, and a method of controlling phases of spin waves. In the method of generating spin waves, strong spin waves are generated by supplying various shapes of energies to a magnetic material in which a magnetic vortex and magnetic antivortex spin structures exist separately or together. In the logic operation device, wave factors of frequency, wavelength, amplitude, and phase of a spin wave generated by the method of generating spin waves are controlled and wave characteristics such as reflection, refraction, transmission, tunneling, superposition, interference, and diffraction are used.
    Type: Grant
    Filed: September 28, 2006
    Date of Patent: April 24, 2012
    Assignee: Seoul National University Industry Foundation
    Inventors: Sang-Koog Kim, Ki-Suk Lee, Sang-Kook Choi
  • Publication number: 20080255697
    Abstract: A system and method of transferring wafers by the lot to a vertical furnace are disclosed. The method includes receiving batch information related to a track-in operation and storing the batch information in a memory associated with the vertical furnace, wherein the batch information identifies a plurality of lots, sequentially transferring a plurality of carriers associated with the plurality of lots from an 1/0 port of the vertical furnace to a carrier stocker, transferring at least one of the plurality of carriers from the stock carrier to a wafer transfer stage before the carrier stocker receives all of the carriers in the plurality of carriers, and transferring wafers from at least one of the plurality of carriers from the wafer transfer stage to wafer boat.
    Type: Application
    Filed: March 24, 2008
    Publication date: October 16, 2008
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Jae-Woo CHUNG, Sang-Kook CHOI
  • Publication number: 20080231392
    Abstract: Provided are a method of generating strong spin waves, a method of simultaneously generating spin waves and electromagnetic waves, a logic operation device using spin waves, a variety of spin wave devices employing the same, and a method of controlling phases of spin waves. In the method of generating spin waves, strong spin waves are generated by supplying various shapes of energies to a magnetic material in which a magnetic vortex and magnetic antivortex spin structures exist separately or together. When energies are applied to a patterned magnetic material so that magnetic vortex or magnetic antivortex can be generated, a strong torque is generated in a vortex core so that strong spin waves can be generated from the vortex core. The spin waves generated in this way have large amplitudes, short wavelengths, and high frequencies.
    Type: Application
    Filed: September 28, 2006
    Publication date: September 25, 2008
    Inventors: Sang-Koog Kim, Ki-Suk Lee, Sang-Kook Choi
  • Publication number: 20070181192
    Abstract: An apparatus for monitoring gas flow in a semiconductor manufacturing equipment, includes an exhaust line, a flow amount measuring unit, and a controller unit having a first input electrically connected to the flow amount measuring unit and a second input having a predetermined reference value, the controller unit having the capability of comparing data in the first input to the predetermined reference value in the second input and generate a signal when the data in the first input exceed the predetermined reference value. The apparatus of the present invention may be incorporated into a gas delivery system employed in semiconductor manufacturing to detect gas leaks.
    Type: Application
    Filed: October 12, 2006
    Publication date: August 9, 2007
    Inventors: Sang-Kook Choi, Chang-Hyun Lim, Young-Sang Lee, Nam-Oh Kim
  • Patent number: 6837619
    Abstract: A furnace temperature detector includes a spike thermocouple attached to a heating chamber; an overheat thermocouple attached to the heating chamber; an inner thermocouple installed inside a reaction tube; a temperature controller connected to the spike thermocouple and the inner thermocouple; an overheat controller connected the overheat thermocouple; and a control switch for directing the output line of the overheat thermocouple. When the furnace overheats, the overheat thermocouple detects the overheating and generates and outputs an electric signal corresponding to the overheating to the overheat controller; the overheat controller generates and outputs an overheat control signal.
    Type: Grant
    Filed: May 21, 2003
    Date of Patent: January 4, 2005
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Seong-Ho Cho, Sang-Kook Choi
  • Publication number: 20040004993
    Abstract: A furnace temperature detector includes a spike thermocouple attached to a heating chamber; an overheat thermocouple attached to the heating chamber; an inner thermocouple installed inside a reaction tube; a temperature controller connected to the spike thermocouple and the inner thermocouple; an overheat controller connected the overheat thermocouple; and a control switch for directing the output line of the overheat thermocouple. When the furnace overheats, the overheat thermocouple detects the overheating and generates and outputs an electric signal corresponding to the overheating to the overheat controller; the overheat controller generates and outputs an overheat control signal.
    Type: Application
    Filed: May 21, 2003
    Publication date: January 8, 2004
    Inventors: Seong-Ho Cho, Sang-Kook Choi
  • Patent number: 6340625
    Abstract: A method for forming a dual oxide layer on a silicon substrate provides that layer having varying thicknesses by using a damage layer formed on the silicon substrate, or a silicon nitride layer deposited on the silicon substrate. The damage layer is formed on the silicon substrate by dry etching a designated part of the silicon substrate, and the dual oxide layer is formed by using the properties of SiO2 by which the oxide layer growth speed on the damage layer is slower than that on the silicon substrate. A pattern of the damage layer is defined by photolithography, and the damage layer having a depth of about 20 to 5,000 Å is formed using CF4, CHF3, or Ar gas at a pressure of 900 mTorr or less, or using Cl2 or HBr. In the preoxidation cleaning step, a solution containing NH4F, HF, and H2O, a standard solution containing NH4OH, H2O2, and H2O, and/or HF are used.
    Type: Grant
    Filed: February 4, 2000
    Date of Patent: January 22, 2002
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sang Kook Choi, Kyung Hawn Cho, Won Sik An, Chung Hwan Kwon
  • Patent number: 6207588
    Abstract: A method for forming a dual oxide layer on a silicon substrate provides that layer having varying thicknesses by using a damage layer formed on the silicon substrate, or a silicon nitride layer deposited on the silicon substrate. The damage layer is formed on the silicon substrate by dry etching a designated part of the silicon substrate, and the dual oxide layer is formed by using the properties of SiO2 by which the oxide layer growth speed on the damage layer is slower than that on the silicon substrate. A pattern of the damage layer is defined by photolithography, and the damage layer having a depth of about 20 to 5,000 Å is formed using CF4, CHF3, or Ar gas at a pressure of 900 m Torr or less, or using Cl2 or HBr. In the preoxidation cleaning step, a solution containing NH4F, HF, and H2O, a standard solution containing NH4OH, H2O2, and H2O, and/or HF are used.
    Type: Grant
    Filed: August 18, 1998
    Date of Patent: March 27, 2001
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sang Kook Choi, Kyung Hawn Cho, Won Sik An, Chung Hwan Kwon
  • Patent number: 6068316
    Abstract: A large diameter wafer conveying system includes a vacuum supplier and a valve unit for ON/OFF controlling a vacuum supplied from the vacuum supplier. A wafer holder stably absorbs and holds a wafer by using the vacuum supplied from the vacuum supplier through the valve unit. A residual vacuum clearer automatically clears a portion of the vacuum which remains after the valve unit is turned OFF to completely remove the vacuum.
    Type: Grant
    Filed: December 18, 1996
    Date of Patent: May 30, 2000
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Dae-Woo Kim, Chang-Hyun Lim, Sang-Kook Choi, Jong-Dae Park
  • Patent number: 5780317
    Abstract: An oxidizing apparatus and a method for forming an oxide film by controlling the oxide film growth using the same are provided. The apparatus includes an oxide film growing means, oxide film thickness measuring means and controlling means in order to form an oxide film of a desired thickness on a wafer. Here, the controlling means automatically calculates the oxide film growing time corresponding to a target thickness of an oxide film to be grown on the wafer. Accordingly, operation is simplified and a differing thicknesses of the oxide film in each batch is minimized, to thereby enhance reliability with respect to a precess and produce uniform product.
    Type: Grant
    Filed: December 24, 1996
    Date of Patent: July 14, 1998
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Yong-min Jun, Jae-man Jang, Sang-kook Choi, Chan-sik Park
  • Patent number: 5753046
    Abstract: A vertical diffusion furnace and a cap therefor are provided to minimize diffusion non-uniformity in a diffusion furnace caused by the positioning of a reaction gas outlet. In the vertical diffusion furnace, a reaction gas outlet is formed in the lower portion of a cap and adapted to extend downward through a flange. Thus, is provided a means to maintain diffusion uniformity in the diffusion furnace to comply with the necessity of processing large diameter wafers needed for highly integrated semiconductor devices. Thereby, a decrease in the rate of productivity for operating such equipment due to its positioning of a reaction gas outlet is prevented.
    Type: Grant
    Filed: November 22, 1996
    Date of Patent: May 19, 1998
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sang-kook Choi, Sang-woon Kim
  • Patent number: 5704984
    Abstract: A chemical vapor deposition (CVD) apparatus having a heat radiation structure. The CVD apparatus has a process chamber wherein the semiconductor substrate is located, a gas inlet for introducing a process gas into the process chamber, a manifold for supporting the process chamber and the gas inlet, and a heat radiating member provided around the gas inlet, for radiating heat transmitted from the manifold. The gas inlet has a plurality of radiation plates formed around the gas inlet and a plurality of through-holes formed in each of the radiation plates. With the gas inlet having the heat radiating structure, heat from the manifold during the deposition process is not transmitted to the gas supply line and the like. Thus the associated parts are not corroded or deformed.
    Type: Grant
    Filed: December 18, 1996
    Date of Patent: January 6, 1998
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Nam-Jin Lee, Sang-Kook Choi, Hyeog-Joon Ko, Chung-Hwan Kwon
  • Patent number: 5616025
    Abstract: A vertical diffusion furnace comprising; a quartz tube, a plurality of wafers loaded into the quartz tube, and a gas inlet formed in the quartz tube proximate a lowermost wafer in the plurality of wafers, and providing reactive gases into the quartz tube.
    Type: Grant
    Filed: November 16, 1995
    Date of Patent: April 1, 1997
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sang-kook Choi, Chung-hwan Kwon, Hong-keun Kim