Patents by Inventor Sang-kyoo Jeong

Sang-kyoo Jeong has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8200998
    Abstract: A method of controlling a power saving mode used in a serial advanced technology attachment (SATA) interface. The method of controlling a power saving mode used in a SATA interface for data transmission between a transmitter and a receiver includes: requesting the receiver to enter one of a plurality of power saving modes in a SATA protocol using the transmitter; and selecting one of the power saving modes using the receiver. In the method of controlling a power saving mode in a SATA interface, since a power saving mode can be selected independently of a power saving mode requested by a transmitter, a system can operate in a power saving mode that is suitable for the required properties of the system in accordance with a SATA protocol. Furthermore, the properties of the system required by a user can be realized by selecting a user-defined power saving mode.
    Type: Grant
    Filed: January 29, 2008
    Date of Patent: June 12, 2012
    Assignee: SAMSUNG Electronics Co., Ltd.
    Inventors: Woo-seong Cheong, Sang-kyoo Jeong, Tae-min Jeong
  • Publication number: 20110004817
    Abstract: A cyclic redundancy check (CRC) management method performed in a serial advanced technology attachment (SATA) interface and a data storage device using the CRC management method. A host interface connected to the SATA interface performs CRC computation on transmitted data to generate a first CRC code, determines whether a host interface block error or a data integrity error occurs, or the status of a data storage device needs to be reported to the host interface, generates a second CRC code, which is different from the first CRC code, according to the determination result. If a frame including the transmitted data and the second CRC code is transmitted to a host, the host performs CRC computation on a data FIS in the transmitted data to expect the first CRC code. Since the CRC code in the transmitted data is the second CRC code, the host recognizes that the transmitted data is wrong and provides an error notification to the data storage device.
    Type: Application
    Filed: May 17, 2010
    Publication date: January 6, 2011
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Woo-seong CHEONG, Tae-min JEONG, Sang-kyoo JEONG
  • Publication number: 20100274953
    Abstract: A data storage device comprises a plurality of memory devices and a memory controller. The memory controller exchanges data with the memory devices via a plurality of channels. The memory controller decodes an external command to generate a driving power mode and accesses the memory devices according to the driving power mode.
    Type: Application
    Filed: April 21, 2010
    Publication date: October 28, 2010
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Tae Hack LEE, Sang Kyoo JEONG, Myung Hyun JO, Chan Ik PARK
  • Publication number: 20100241930
    Abstract: An error correction device is provided. The error correction device includes a code storage unit where a plurality of error correction codes are stored, a first error correction unit to correct a data error detected from input data by using one of a plurality of error correction codes and to output correction data, a buffer to store the correction data, and a second error correction unit to generate a new correction code from the correction data, to compare another of a plurality of error correction codes with the new correction code and to output a comparison result.
    Type: Application
    Filed: March 10, 2010
    Publication date: September 23, 2010
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Sil Wan CHANG, Bum Seok Yu, Sang Kyoo Jeong, Dong Gi Lee
  • Publication number: 20100211808
    Abstract: A data storage device includes a data storage medium and a controller. The controller is configured to control at least one of a reading, erasing, and writing operation on the data storage medium. The controller includes an interface and a power management unit. The interface is configured to exchange at least one of a command, an address, and data with a host. The power management unit is configured to change the power mode of the interface into a power saving mode if: a command input from the host is not executed, data transfer is not actually executed in executing the command, or status information is not reported after the command is executed.
    Type: Application
    Filed: December 29, 2009
    Publication date: August 19, 2010
    Inventors: Tae-Min Jeong, Sang-Kyoo Jeong
  • Publication number: 20080184051
    Abstract: A method of controlling a power saving mode used in a serial advanced technology attachment (SATA) interface. The method of controlling a power saving mode used in a SATA interface for data transmission between a transmitter and a receiver includes: requesting the receiver to enter one of a plurality of power saving modes in a SATA protocol using the transmitter; and selecting one of the power saving modes using the receiver. In the method of controlling a power saving mode in a SATA interface, since a power saving mode can be selected independently of a power saving mode requested by a transmitter, a system can operate in a power saving mode that is suitable for the required properties of the system in accordance with a SATA protocol. Furthermore, the properties of the system required by a user can be realized by selecting a user-defined power saving mode.
    Type: Application
    Filed: January 29, 2008
    Publication date: July 31, 2008
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Woo-seong CHEONG, Sang-kyoo JEONG, Tae-min JEONG
  • Publication number: 20060026315
    Abstract: An apparatus and method of establishing data transmission speed between a host and a device connected to a serial Advanced Technology Attachment (ATA) interface, the method includes initiating a first data transmission speed between the host and the device, transmitting a data transmission speed change command, and initiating a second data transmission speed different from the first data transmission speed in response to the data transmission speed change command.
    Type: Application
    Filed: July 27, 2005
    Publication date: February 2, 2006
    Inventors: Si-Hoon Hong, Sang-Kyoo Jeong