Abstract: A data storage device includes a memory device including a normal data region and a mapping data region, the normal data region being configured to store normal data, the mapping data region being configured to store mapping data; a host request managing device configured to manage a read/write request from a host; a mapping managing device configured to cache a part of the mapping data and to manage mapping information according to a request from the host request managing device; and a memory controller configured to manage an operation of the memory device according to a request from at least one of the host request managing device and the mapping managing device.

Abstract: A control device for controlling a memory device to process requests from a plurality of hosts may include a request controller configured to manage a set representing storage space allocated to each of the plurality of the hosts; and a set controller configured to monitor requests from the plurality of hosts and to adjust size of the set, wherein, when the request is a write request from a host among the plurality of hosts, the request controller selects a target physical address among physical addresses included in the set allocated to the host, the target physical address indicating where the request is to be processed.

Abstract: A data storage device includes a memory device including a normal data region and a mapping data region, the normal data region being configured to store normal data, the mapping data region being configured to store mapping data; a host request managing device configured to manage a read/write request from a host; a mapping managing device configured to cache a part of the mapping data and to manage mapping information according to a request from the host request managing device; and a memory controller configured to manage an operation of the memory device according to a request from at least one of the host request managing device and the mapping managing device.

Abstract: A semiconductor device includes a mapping cache configured to cache mapping data stored in a memory device, and a cache controller configured to manage the mapping cache, wherein the mapping cache comprises a first cache including a plurality of cache blocks, each cache block storing first mapping information and a link for another cache block storing second mapping information having a relationship with the first mapping information.

Abstract: One embodiment provides a technique of adjusting a gate voltage to be applied to at least one MOS capacitor and an amount of electric charges to be stored in the MOS capacitor so as to determine a sensitivity of a change in the amount of electric charges stored in the MOS capacitor, and exposing the MOS capacitor to an electric filed for a predetermined amount of time and then reading an electron inflow or outflow result due to the electric field so as to interpret the intensity and the direction of the electric field, thereby measuring the intensity and the direction of the electric field.

Abstract: A semiconductor device may include a task controller configured to generate a target share for a plurality of task generators according to respective target states and respective measured states of the plurality of task generators, a task scheduler configured to schedule the plurality of tasks according to an allocated share, the plurality of tasks being provided from the plurality of task generators, and a share controller configured to determine the allocated share according to the target share and a measured share of the plurality of task generators.

Abstract: A control device for controlling a memory device to process requests from a plurality of hosts may include a request controller configured to manage a set representing storage space allocated to each of the plurality of the hosts; and a set controller configured to monitor requests from the plurality of hosts and to adjust size of the set, wherein, when the request is a write request from a host among the plurality of hosts, the request controller selects a target physical address among physical addresses included in the set allocated to the host, the target physical address indicating where the request is to be processed.

Abstract: A semiconductor device includes a mapping cache configured to cache mapping data stored in a memory device, and a cache controller configured to manage the mapping cache, wherein the mapping cache comprises a first cache including a plurality of cache blocks, each cache block storing first mapping information and a link for another cache block storing second mapping information having a relationship with the first mapping information.

Abstract: A semiconductor device may include a task controller configured to generate a target share for a plurality of task generators according to respective target states and respective measured states of the plurality of task generators, a task scheduler configured to schedule the plurality of tasks according to an allocated share, the plurality of tasks being provided from the plurality of task generators, and a share controller configured to determine the allocated share according to the target share and a measured share of the plurality of task generators.

Abstract: One embodiment provides a technique of adjusting a gate voltage to be applied to at least one MOS capacitor and an amount of electric charges to be stored in the MOS capacitor so as to determine a sensitivity of a change in the amount of electric charges stored in the MOS capacitor, and exposing the MOS capacitor to an electric filed for a predetermined amount of time and then reading an electron inflow or outflow result due to the electric field so as to interpret the intensity and the direction of the electric field, thereby measuring the intensity and the direction of the electric field.

Abstract: A storage device includes a host interface, a buffer memory, a storage medium, and a controller. The host interface is configured to receive storage data and an invalidation command, where the invalidation command is indicative of invalid data among the storage data received by the host interface. The buffer memory is configured to temporarily store the storage data received by the host interface. The controller is configured to execute a transcribe operation in which the storage data temporarily stored in the buffer memory is selectively stored in the storage medium. Further, the controller is responsive to receipt of the invalidation command to execute a logging process when a memory capacity of the invalid data indicated by the invalidation command is equal to or greater than a reference capacity.

Abstract: A memory device detects and correct bit errors. The memory device includes cyclic redundancy check (CRC) and error correction code (ECC) circuits. The CRC circuit generates a write CRC code corresponding to data to be stored in memory cells. The ECC circuit generates an ECC code corresponding to the data and detecting and correcting a bit error of the data by means of the ECC code during a read operation. The CRC circuit generates a read CRC code corresponding to data corrected by the ECC circuit during the read operation, and detects a bit error of the data according to a comparison of the read CRC code and the write CRC code.

Abstract: Disclosed are a system and method for controlling a flash memory using a descriptor array, which may maximize a performance of a flash memory based-storage system. The system includes a descriptor array receipt unit for receiving, from a processor, a descriptor array including, at least one descriptor corresponding to at least one operation; and a flash memory control unit for verifying the descriptor included in the descriptor array and executing a flash memory control command included in the verified descriptor, wherein the flash memory control unit executes the flash memory control command independent from the operation of the processor.

Abstract: A system for processing a read request for maximizing host read performance in a flash memory-based storage device is provided. The system for processing the read request solves a bottleneck phenomenon caused by a processor by adding an independent automatic read request processor, different from a conventional system in which a processor of a storage device processes the read request. Also, when processing the read request, a storage device using a write buffer may control a process of merging data of the write buffer and a flash memory and transmitting the data to a host based on a descriptor array, thereby minimizing processor overhead.

Abstract: A storage device includes a host interface, a buffer memory, a storage medium, and a controller. The host interface is configured to receive storage data and an invalidation command, where the invalidation command is indicative of invalid data among the storage data received by the host interface. The buffer memory is configured to temporarily store the storage data received by the host interface. The controller is configured to execute a transcribe operation in which the storage data temporarily stored in the buffer memory is selectively stored in the storage medium. Further, the controller is responsive to receipt of the invalidation command to execute a logging process when a memory capacity of the invalid data indicated by the invalidation command is equal to or greater than a reference capacity.

Abstract: A storage device includes a host interface, a buffer memory, a storage medium, and a controller. The host interface is configured to receive storage data and an invalidation command, where the invalidation command is indicative of invalid data among the storage data received by the host interface. The buffer memory is configured to temporarily store the storage data received by the host interface. The controller is configured to execute a transcribe operation in which the storage data temporarily stored in the buffer memory is selectively stored in the storage medium. Further, the controller is responsive to receipt of the invalidation command to execute a logging process when a memory capacity of the invalid data indicated by the invalidation command is equal to or greater than a reference capacity, and to execute an invalidation process when the memory capacity of the invalid data is less than the reference capacity.

Abstract: A storage system includes a storage medium configured to store data and a buffer memory configured to buffer data to be written to the storage medium. The storage system further includes a controller configured to selectively transfer the buffered data to the storage medium responsive to an invalidity indicator received from an external source. For example, the invalidity indicator may comprise unwrite information received from an external source, e.g., information that indicates that selected buffered data corresponds to deleted file data.

Abstract: A storage system includes a storage medium configured to store data and a buffer memory configured to buffer data to be written to the storage medium. The storage system further includes a controller configured to selectively transfer the buffered data to the storage medium responsive to an invalidity indicator received from an external source. For example, the invalidity indicator may comprise unwrite information received from an external source, e.g., information that indicates that selected buffered data corresponds to deleted file data.

Abstract: A flash memory management method is provided. According to the method, when a request to write the predetermined data to a page to which data has been written is made, the predetermined data is written to a log block corresponding to a data block containing the page. When a request to write the predetermined data to the page again is received, the predetermined data is written to an empty free page in the log block. Even if the same page is requested to be continuously written to, the management method allows this to be processed in one log block, thereby improving the effectiveness in the use of flash memory resources.

Abstract: A flash memory management method is provided. According to the method, when a request to write the predetermined data to a page to which data has been written is made, the predetermined data is written to a log block corresponding to a data block containing the page. When a request to write the predetermined data to the page again is received, the predetermined data is written to an empty free page in the log block. Even if the same page is requested to be continuously written to, the management method allows this to be processed in one log block, thereby improving the effectiveness in the use of flash memory resources.