Patents by Inventor Sang M. Moh

Sang M. Moh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Parallel multiplier using skip array and modified wallace tree
    Patent number: 5181185
    Abstract: A parallel multiplier by a skip array and a modified Wallace tree utilizes a modified Booth's encoder for encoding a multiplier according to a modified Booth's algorithm, a skip array for partial products, a modified wallace tree for adding binary bits, and a hybrid prefix adder for adding the final two lines. Fast multiplication of 0 (log n) is continuously performed without a standby state of a carry output and the regularity of the arrangement of the parallel multiplier is improved so that its chip area and manufacturing cost are reduced.
    Type: Grant
    Filed: January 4, 1991
    Date of Patent: January 19, 1993
    Assignee: Samsumg Electronics Co., Ltd.
    Inventors: Tack D. Han, Sang M. Moh