Abstract: An array substrate of the present invention includes a storage capacitor that has a storage-on-gate structure. One embodiment of the present invention discloses the array substrate having a metal island pattern on the substrate beneath a drain electrode. The metal island pattern is disposed beneath a drain contact hole through which a pixel electrode contacts the drain electrode. Since the metal island pattern has the same thickness as the gate line, the passivation layer can have the same height both in a drain region and in a storage region. Over-etching is minimized with the passivation layer in the drain and storage region having the same uniform thickness.

Abstract: An array substrate of the present invention includes a storage capacitor that has a storage-on-gate structure. The storage capacitor includes a gate line as a first electrode and a capacitor electrode as a second electrode. The capacitor electrode particularly has an extension that protruding from the capacitor electrode into a pixel region. Thus, when connecting a pixel electrode to the storage capacitor, the pixel electrode contacts the extension of the capacitor electrode. Since a storage contact hole through which the pixel electrode contacts the extension, a short between the pixel electrode and the gate line in the storage capacitor is prevented.

Abstract: An array substrate for a liquid crystal display device, comprising: a substrate; a gate line on the substrate; a data line crossing the gate line to define a pixel region; a thin film transistor connected to the gate line and the data line, and includes a gate electrode, an active layer, an ohmic contact layer, and source and drain electrodes; and a pixel electrode connected to the thin film transistor, and disposed at the pixel region, wherein the gate electrode includes a first sunken portion overlapping the drain electrode and a second portion overlapping the same electrode.

Abstract: An array substrate of the present invention includes a storage capacitor that has a storage-on-gate structure. One embodiment of the present invention discloses the array substrate having a metal island pattern on the substrate beneath a drain electrode. The metal island pattern is disposed beneath a drain contact hole through which a pixel electrode contacts the drain electrode. Since the metal island pattern has the same thickness as the gate line, the passivation layer can have the same height both in a drain region and in a storage region. Over-etching is minimized with the passivation layer in the drain and storage region having the same uniform thickness.

Abstract: An array substrate of the present invention includes a storage capacitor that has a storage-on-gate structure. One embodiment of the present invention discloses the array substrate having a metal island pattern on the substrate beneath a drain electrode. The metal island pattern is disposed beneath a drain contact hole through which a pixel electrode contacts the drain electrode. Since the metal island pattern has the same thickness as the gate line, the passivation layer can have the same height both in a drain region and in a storage region. Over-etching is minimized with the passivation layer in the drain and storage region having the same uniform thickness.

Abstract: A gray tone mask, which is patterned and used in a photolithographic manufacturing process wherein a plurality of thin films are deposited and patterned on a substrate, said mask having different gaps in the vertical and horizontal directions so that the quantity of light which passes the patterned mask and irradiated on the photosensitive material is controlled depending on the direction of light irradiated from an exposing apparatus; and a method of manufacturing a TFT of a LCD using just four masks.

Abstract: A line-on-glass (LOG)-type liquid crystal display device includes a picture display area having liquid crystal cells arranged where gate lines and data lines cross each other, a storage capacitor provided at each of the liquid crystal cells to maintain a charged pixel voltage, and a dummy gate line. (LOG)-type signal lines are provided by a line-on-glass technique outside a picture display area and transmit driving signals required by gate driver integrated circuits to drive the gate lines. The dummy gate line has a smaller resistance value than others of the gate lines.

Abstract: A liquid crystal display having a liquid crystal display panel driven according a dot inversion method using a data driver driven according to a column inversion method includes dummy liquid crystal cells formed in first and last ones of successive columns in the liquid crystal display panel.

Abstract: A liquid crystal display and a method of driving the same is capable of for preventing a difference in brightness from occurring between horizontal line blocks. A liquid crystal display includes a liquid crystal display panel having liquid crystal cells arranged in a matrix pattern; at least one integrated circuit for driving the liquid crystal display panel; a supply line commonly connected to the at least one integrated circuit for applying drive signals to the at least one integrated circuit; and a signal-limiting part formed at an input terminal of the supply line, wherein the supply line has a higher resistance than the sum of the line resistances of the entire supply line.

Abstract: A liquid crystal display panel capable of improving a picture quality and reducing power dissipation includes a plurality of liquid crystal cells each having a thin film transistor formed at a crossing of gate lines and date lines, and a pixel electrode connected to the thin film transistor; a first parasitic capacitor formed between a data line and an adjacent preceding or succeeding pixel first electrode; a second parasitic capacitor formed between the data line and an preceding or succeeding pixel second electrode; and a groove formed at a portion of the pixel electrode adjacent the data line and opposing a portion coupled to the thin film transistor.

Abstract: A liquid crystal display capable of reducing power consumption includes liquid crystal cells arranged in a matrix at crossings of a plurality of gate lines and data lines, a thin film transistor connected to the data lines in an alternating pattern based upon an arrangement of the data lines included in the liquid crystal cells, a data driver configured to supply a video signal to the liquid crystal cells and shift the video signal by one channel to the right to drive the data lines, and an interlayer-insulation material formed by organic insulation film having a dielectric constant below about 4. The interlayer-insulation material may be located between the data line and a pixel electrode formed in each of the liquid crystal cells.

Abstract: An array substrate for a liquid crystal display device, comprising: a substrate; a gate line on the substrate; a data line crossing the gate line to define a pixel region; a thin film transistor connected to the gate line and the data line, and includes a gate electrode, an active layer, an ohmic contact layer, and source and drain electrodes; and a pixel electrode connected to the thin film transistor, and disposed at the pixel region, wherein the gate electrode includes a first sunken portion overlapping the drain electrode and a second portion overlapping the same electrode.

Abstract: A liquid crystal display includes a liquid crystal display panel driven by a dot inversion method using a data driver driven by a column inversion method. Within the liquid crystal display, liquid crystal cells capable of expressing any one color are alternately arranged adjacent left and right sides along the length of a data line.

Abstract: A liquid crystal display having a liquid crystal display panel driven according a dot inversion method using a data driver driven according to a column inversion method includes dummy liquid crystal cells formed in first and last ones of successive columns in the liquid crystal display panel.

Abstract: A line-on-glass (LOG)-type liquid crystal display device includes a picture display area having liquid crystal cells arranged where gate lines and data lines cross each other, a storage capacitor provided at each of the liquid crystal cells to maintain a charged pixel voltage, and a dummy gate line. (LOG)-type signal lines are provided by a line-on-glass technique outside a picture display area and transmit driving signals required by gate driver integrated circuits to drive the gate lines. The dummy gate line has a smaller resistance value than others of the gate lines.

Abstract: A line-on-glass (LOG) type liquid crystal display device prevents deterioration in picture quality due to line resistances in LOG signal lines includes a display area having liquid crystal cells arranged at crossings of gate and data lines, a storage capacitor arranged within each of the liquid crystal cells for maintaining charged pixel voltages, and a dummy gate line. A line-on-glass type signal line group outside the display area transmits driving signals to the gate driver integrated circuits for driving the gate lines. A first signal line outside the display area is mounted on gate tape carrier packages. A second signal line connects the first gate low voltage and dummy lines, is insulated from, and crosses the gate lines outside the display area. A third signal line connects the first gate low voltage line and the dummy gate line to connect the first and second gate low voltage lines in parallel.

Abstract: An array substrate of the present invention includes a storage capacitor that has a storage-on-gate structure. One embodiment of the present invention discloses the array substrate having a metal island pattern on the substrate beneath a drain electrode. The metal island pattern is disposed beneath a drain contact hole through which a pixel electrode contacts the drain electrode. Since the metal island pattern has the same thickness as the gate line, the passivation layer can have the same height both in a drain region and in a storage region. Over-etching is minimized with the passivation layer in the drain and storage region having the same uniform thickness.

Abstract: An array substrate of the present invention includes a storage capacitor that has a storage-on-gate structure. The storage capacitor includes a gate line as a first electrode and a capacitor electrode as a second electrode. The capacitor electrode particularly has an extension that protruding from the capacitor electrode into a pixel region. Thus, when connecting a pixel electrode to the storage capacitor, the pixel electrode contacts the extension of the capacitor electrode. Since a storage contact hole through which the pixel electrode contacts the extension, a short between the pixel electrode and the gate line in the storage capacitor is prevented.

Abstract: A gray tone mask, which is patterned and used in a photolithographic manufacturing process wherein a plurality of thin films are deposited and patterned on a substrate, said mask having different gaps in the vertical and horizontal directions so that the quantity of light which passes the patterned mask and irradiated on the photosensitive material is controlled depending on the direction of light irradiated from an exposing apparatus; and a method of manufacturing a TFT of a LCD using just four masks.