Patents by Inventor SANG YIL CHANG

SANG YIL CHANG has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method for adjusting target layout based on intensity of background light in etch mask layer
    Patent number: 9064085
    Abstract: A method of forming a semiconductor circuit includes receiving target layout. An optical proximity correction process is performed on the target layout data to generate a post-OPC layout. A patterning process is performed using the post-OPC layout. The post-OPC layout may be adjusted to compensate for a top loss of an etch mask layer.
    Type: Grant
    Filed: September 19, 2014
    Date of Patent: June 23, 2015
    Assignees: Samsung Electronics Co., Ltd., International Business Machines Corporation
    Inventors: Sang Yil Chang, Geng Han, Wai-kin Li
  • METHOD OF FORMING A SEMICONDUCTOR CIRCUIT
    Publication number: 20150007119
    Abstract: A method of forming a semiconductor circuit includes receiving target layout. An optical proximity correction process is performed on the target layout data to generate a post-OPC layout. A patterning process is performed using the post-OPC layout. The post-OPC layout may be adjusted to compensate for a top loss of an etch mask layer.
    Type: Application
    Filed: September 19, 2014
    Publication date: January 1, 2015
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Sang Yil Chang, Geng Han, Wai-kin Li
  • Method for generating post-OPC layout in consideration of top loss of etch mask layer
    Patent number: 8856695
    Abstract: A method of forming a semiconductor circuit includes receiving target layout. An optical proximity correction process is performed on the target layout data to generate a post-OPC layout. A patterning process is performed using the post-OPC layout. The post-OPC layout may be adjusted to compensate for a top loss of an etch mask layer.
    Type: Grant
    Filed: March 14, 2013
    Date of Patent: October 7, 2014
    Assignees: Samsung Electronics Co., Ltd., International Business Machines Corporation
    Inventors: Sang Yil Chang, Geng Han, Wai-Kin Li
  • METHOD FOR GENERATING POST-OPC LAYOUT IN CONSIDERATION OF TOP LOSS OF ETCH MASK LAYER
    Publication number: 20140282297
    Abstract: A method of forming a semiconductor circuit includes receiving target layout. An optical proximity correction process is performed on the target layout data to generate a post-OPC layout. A patterning process is performed using the post-OPC layout. The post-OPC layout may be adjusted to compensate for a top loss of an etch mask layer.
    Type: Application
    Filed: March 14, 2013
    Publication date: September 18, 2014
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: SANG YIL CHANG, Geng Han, Wai-Kin Li