Abstract: A memory device includes first and second material layers alternately stacked; a vertical hole passing through the first and second material layers; first insulating patterns protruding from a side surface of the first material layers exposed through the vertical hole; a blocking layer formed along a surface of the second material layers exposed between the first insulating patterns, the blocking layer comprising a plurality of concave portions, each of which is between the first insulating patterns; and charge trap patterns formed in the concave portions, wherein portions of the blocking layer exposed between the charge trap patterns, wherein a tunnel insulating layer, a channel layer, and a core pillar, are formed in an area that is substantially surrounded by the charge trap patterns.

Abstract: A thin film transistor according to an exemplary embodiment of the present invention includes an oxide semiconductor. A source electrode and a drain electrode face each other. The source electrode and the drain electrode are positioned at two opposite sides, respectively, of the oxide semiconductor. A low conductive region is positioned between the source electrode or the drain electrode and the oxide semiconductor. An insulating layer is positioned on the oxide semiconductor and the low conductive region. A gate electrode is positioned on the insulating layer. The insulating layer covers the oxide semiconductor and the low conductive region. A carrier concentration of the low conductive region is lower than a carrier concentration of the source electrode or the drain electrode.

Abstract: A display substrate may include a substrate and a wiring on the substrate. The wiring may include a metal oxide layer including at least one oxide selected from tantalum (Ta), niobium (Nb), and titanium (Ti), and a metal layer on the metal oxide layer and including copper (Cu), and a thickness of the metal oxide layer may be in a range of about 30 angstroms (?) to about 50 ?.

Abstract: A method of manufacturing an organic light-emitting display device is provided. The method includes: forming a lower electrode pattern on a substrate, which includes a transistor area and a capacitor area, to correspond to the transistor area and forming a buffer layer on the substrate including the lower electrode pattern; forming a thin-film transistor including an oxide semiconductor layer on the buffer layer; forming an interlayer insulating film on the thin-film transistor; forming a photoresist film pattern including first and second holes, which have different depths, on the interlayer insulating film; and forming a first contact hole, which exposes the lower electrode pattern, and second contact holes, which expose the oxide semiconductor layer, at the same time using the photoresist film pattern.

Abstract: A display device is provided. The display device includes a substrate including a display area and a pad area, which is disposed on one side of the display area, a plurality of conductive layers disposed on the substrate, in the display area and the pad area, a passivation layer disposed on the conductive layers, and a plurality of light-emitting elements disposed on the passivation layer, in the display area, and spaced apart from one another, wherein at least one of the conductive layers includes a first metal layer, a second metal layer, which is disposed on the first metal layer, and a third metal layer, which is disposed on the second metal layer, the first metal layer includes vanadium (V), the second metal layer includes aluminum (Al) or an Al alloy, and the third metal layer includes V or titanium (Ti).

Abstract: A display device includes: a first pixel electrode disposed in a first emission area, on a substrate; an insulating layer covering edges of the first pixel electrode; a first light-emitting layer disposed on the first pixel electrode and the insulating layer; a first common electrode disposed on the first light-emitting layer; banks disposed on the insulating layer and surrounding the first emission area; and a first organic pattern surrounding the first emission area, disposed on the banks, and including the same material as the first light-emitting layer. Side surfaces of each of the banks are spaced apart from side surfaces of the insulating layer.

Abstract: An manufacturing method of a display device may include the following steps: forming a transistor on a substrate; forming an insulating layer on the transistor; forming a conductive layer including silver on the insulating layer; forming a photosensitive member on the conductive layer; forming an electrode of a light-emitting element by etching the conductive layer; performing plasma treatment on a structure that comprises the electrode, the plasma treatment using a gas including a halogen; and removing a product that is resulted from the plasma treatment.

Abstract: A conductive line for a display device may include a first layer including aluminum (Al) or an aluminum alloy, a second layer disposed on the first layer, the second layer including titanium nitride (TiNx), and a third layer disposed on the second layer, the third layer including titanium (Ti) and having a multilayer structure including a plurality of stacked sub-layers.

Abstract: Provided is a display device. The display device includes: a substrate; a gate line disposed on the substrate; a transistor including a part of the gate line; and a light-emitting element connected to the transistor, in which the gate line includes a first layer including aluminum or an aluminum alloy, a second layer including titanium nitride, and a third layer including metallic titanium nitride. An N/Ti molar ratio of the metallic titanium nitride may be in a range from about 0.2 to about 0.75.

Abstract: A light emitting diode device includes a thin film transistor substrate having a plurality of light emitting areas, a first diode electrode and a second diode electrode on the thin film transistor substrate, a first passivation pattern between the first diode electrode and the second diode electrode, a plurality of micro light emitting diodes on the first passivation pattern, a first bridge pattern on the micro light emitting diodes and electrically connecting the first diode electrode to the micro light emitting diodes, and a second bridge pattern on the first bridge pattern and electrically connecting the second diode electrode to the micro light emitting diodes, wherein each sidewall of each of the micro light emitting diodes and each sidewall of the first passivation pattern form a same plane.

Abstract: Provided is a display device. The display device includes: a substrate; a gate line disposed on the substrate; a transistor including a part of the gate line; and a light-emitting element connected to the transistor, in which the gate line includes a first layer including aluminum or an aluminum alloy, a second layer including titanium nitride, and a third layer including metallic titanium nitride. An N/Ti molar ratio of the metallic titanium nitride may be in a range from about 0.2 to about 0.75.

Abstract: A display device includes a thin film transistor on a base substrate and a signal wiring electrically connected to the thin film transistor. The signal wiring includes a main conductive layer including copper, and a capping layer including titanium the capping layer overlapping a portion of an upper surface of the main conductive layer. The signal wiring has a taper angle in a range of about 70° to about 90°. A thickness of the capping layer is in a range of about 100 ? to about 300 ?, and a thickness of the main conductive layer is in a range of about 1,000 ? to about 20,000 ?.

Abstract: A thin film transistor according to an exemplary embodiment of the present invention includes an oxide semiconductor. A source electrode and a drain electrode face each other. The source electrode and the drain electrode are positioned at two opposite sides, respectively, of the oxide semiconductor. A low conductive region is positioned between the source electrode or the drain electrode and the oxide semiconductor. An insulating layer is positioned on the oxide semiconductor and the low conductive region. A gate electrode is positioned on the insulating layer. The insulating layer covers the oxide semiconductor and the low conductive region. A carrier concentration of the low conductive region is lower than a carrier concentration of the source electrode or the drain electrode.

Abstract: A method of manufacturing a display substrate may include the following steps: forming a drain electrode on a pixel area of a substrate; forming a pad electrode on a pad area of the substrate; forming an inorganic insulation layer that covers the drain electrode and the pad electrode; forming an organic insulation member that has a first thickness at the pixel area of the substrate, has a second thickness less than the first thickness at the pad area of the substrate, exposes a first portion of the inorganic insulation layer on the drain electrode, and exposes a second portion of the inorganic insulation layer on the pad electrode; removing the first portion of the inorganic insulation layer and the second portion of the inorganic insulation layer; and partially removing the organic insulation member.

Abstract: A display panel includes: a plurality of first electrodes disposed on a via-layer and corresponding to a plurality of pixel areas, respectively; a pixel-defining layer disposed on the via-layer; first opening parts corresponding to central portions of the first electrodes and penetrating through the pixel-defining layer; electrode undercuts corresponding to edges of the first opening parts and provided as gaps between the first electrodes and the pixel-defining layer; a plurality of second opening parts corresponding to peripheries of the first electrodes, respectively, and penetrating through the pixel-defining layer; and via-grooves corresponding to the second opening parts and defined on an upper surface of the via-layer; via-undercuts provided by the pixel-defining layer around the second opening parts and the via-layer around the via-grooves.

Abstract: A display device includes a first base, a pixel electrode on the first base, a pixel defining layer having an opening that at least partially exposes the pixel electrode, a light emitting layer on the pixel electrode, an auxiliary electrode on the same layer as the pixel electrode, a partition wall on the auxiliary electrode that at least partially exposes a side surface of the auxiliary electrode, an organic layer on the partition wall, and a common electrode continuously arranged on the light emitting layer and the organic layer, wherein a side surface of the partition wall has a reverse-tapered shape, and the common electrode contacts the side surface of the auxiliary electrode.

Abstract: A display device includes a first base, a pixel electrode on the first base, a pixel defining layer having an opening that at least partially exposes the pixel electrode, a light emitting layer on the pixel electrode, an auxiliary electrode on the same layer as the pixel electrode, a partition wall on the auxiliary electrode that at least partially exposes a side surface of the auxiliary electrode, an organic layer on the partition wall, and a common electrode continuously arranged on the light emitting layer and the organic layer, wherein a side surface of the partition wall has a reverse-tapered shape, and the common electrode contacts the side surface of the auxiliary electrode.

Abstract: A display device and a method of the display device are provided. The display device includes a lower metal layer on a substrate, a buffer layer on the lower metal layer, a first semiconductor layer on the buffer layer, a gate insulating layer on the first semiconductor layer, a first gate electrode on the gate insulating layer, an interlayer insulating layer on the first gate electrode, a via layer on the interlayer insulating layer, a pixel electrode on the via layer and electrically connected to the first semiconductor layer, a light emitting layer on the pixel electrode, a common electrode on the light emitting layer, a first contact hole penetrating the buffer layer and the interlayer insulating layer and a second contact hole penetrating the interlayer insulating layer, and a first via hole and a second via hole each penetrating the via layer.

Abstract: A display device includes a thin film transistor on a base substrate and a signal wiring electrically connected to the thin film transistor. The signal wiring includes a main conductive layer including copper, and a capping layer including titanium the capping layer overlapping a portion of an upper surface of the main conductive layer. The signal wiring has a taper angle in a range of about 70° to about 90°. A thickness of the capping layer is in a range of about 100 ? to about 300 ?, and a thickness of the main conductive layer is in a range of about 1,000 ? to about 20,000 ?.

Abstract: A display device includes a base substrate; an organic layer disposed on the base substrate; and a first conductive layer disposed on the organic layer, wherein the first conductive layer includes a plurality of stacked films, the plurality of stacked films include a first conductive film disposed directly on the organic layer and a second conductive film disposed on the first conductive film, and the first conductive film has an oxygen concentration higher than an oxygen concentration of the second conductive film.