Patents by Inventor Sang-Gul Lee
Sang-Gul Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20230389358Abstract: A display apparatus can include a first thin-film transistor including a first active layer having a first polysilicon material, a first gate electrode overlapping the first active layer, a first electrode and a second electrode; a second thin-film transistor including a second active layer having an oxide semiconductor, a second gate electrode overlapping the second active layer, a third electrode and a fourth electrode; and a first emitting electrode of a light emitting element electrically connected to the second electrode of the first thin-film transistor. Also, one end of the first active layer having the first polysilicon material is electrically connected to one or the other end of the second active layer having the oxide semiconductor.Type: ApplicationFiled: August 8, 2023Publication date: November 30, 2023Applicant: LG Display Co., Ltd.Inventors: Seong-Pil CHO, Dong-Yup KIM, Kyung-Mo SON, Sang-Soon NOH, Jun-Seuk LEE, Yong-Bin KANG, Kye-Chul CHOI, Sung-Ho MOON, Sang-Gul LEE, Byeong-Keun KIM, Kyoung-Soo LEE, Hyun-Gyo JEONG, Jin-Kyu ROH, Jung-Doo JIN, Ki-Hyun KWON, Hee-Jin JUNG, Jang-Dae KIM, Won-Ho SON, Chan-Ho KIM
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Patent number: 11776970Abstract: Disclosed is a display device including a substrate including display and non-display areas, a first thin-film transistor located in the non-display area, and second and third thin-film transistors located in the display area. The first thin-film transistor includes a first semiconductor pattern, a first gate electrode overlapping the first semiconductor pattern, and first source and first drain electrodes connected to the first semiconductor pattern. The second thin-film transistor includes second and third semiconductor patterns including a first oxide semiconductor, a second gate electrode overlapping the second semiconductor pattern, a third gate electrode overlapping the third semiconductor pattern, and second source and second drain electrodes connected to the second and third semiconductor patterns.Type: GrantFiled: June 21, 2021Date of Patent: October 3, 2023Assignee: LG Display Co., Ltd.Inventors: Sung Soo Shin, Won Sang Ryu, Sang Gul Lee
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Patent number: 11765935Abstract: A display apparatus including a first thin-film transistor, a second thin-film transistor and a third thin-film transistor is provided. The first thin-film transistor includes a first active layer composed of a polysilicon material, a first gate electrode overlapping the first active layer such that a first gate insulating layer is interposed therebetween, a first source electrode and a first drain electrode. The first gate electrode includes n layers. The first source electrode and the first drain electrode are connected to the first active layer. The second thin-film transistor includes a second active layer composed of a polysilicon material, a second gate electrode overlapping the second active layer such that a first gate insulating layer is interposed therebetween, a second source electrode and a second drain electrode. The second gate electrode includes n+1 layers. The second source electrode and the second drain electrode are connected to the second active layer.Type: GrantFiled: July 6, 2020Date of Patent: September 19, 2023Assignee: LG DISPLAY CO., LTD.Inventors: Seong-Pil Cho, Dong-Yup Kim, Kyung-Mo Son, Sang-Soon Noh, Jun-Seuk Lee, Yong-Bin Kang, Kye-Chul Choi, Sung-Ho Moon, Sang-Gul Lee, Byeong-Keun Kim, Kyoung-Soo Lee, Hyun-Gyo Jeong, Jin-Kyu Roh, Jung-Doo Jin, Ki-Hyun Kwon, Hee-Jin Jung, Jang-Dae Kim, Won-Ho Son, Chan-Ho Kim
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Patent number: 11728351Abstract: Disclosed is a display device including a substrate including display and non-display areas, a first thin-film transistor located in the non-display area, and second and third thin-film transistors located in the display area. The first thin-film transistor includes a first semiconductor pattern, a first gate electrode overlapping the first semiconductor pattern, and first source and first drain electrodes connected to the first semiconductor pattern. The second thin-film transistor includes second and third semiconductor patterns including a first oxide semiconductor, a second gate electrode overlapping the second semiconductor pattern, a third gate electrode overlapping the third semiconductor pattern, and second source and second drain electrodes connected to the second and third semiconductor patterns.Type: GrantFiled: June 21, 2021Date of Patent: August 15, 2023Assignee: LG Display Co., Ltd.Inventors: Sung Soo Shin, Won Sang Ryu, Sang Gul Lee
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Publication number: 20210408061Abstract: Disclosed is a display device including a substrate including display and non-display areas, a first thin-film transistor located in the non-display area, and second and third thin-film transistors located in the display area. The first thin-film transistor includes a first semiconductor pattern, a first gate electrode overlapping the first semiconductor pattern, and first source and first drain electrodes connected to the first semiconductor pattern. The second thin-film transistor includes second and third semiconductor patterns including a first oxide semiconductor, a second gate electrode overlapping the second semiconductor pattern, a third gate electrode overlapping the third semiconductor pattern, and second source and second drain electrodes connected to the second and third semiconductor patterns.Type: ApplicationFiled: June 21, 2021Publication date: December 30, 2021Inventors: Sung Soo Shin, Won Sang Ryu, Sang Gul Lee
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Publication number: 20210005693Abstract: A display apparatus including a first thin-film transistor, a second thin-film transistor and a third thin-film transistor is provided. The first thin-film transistor includes a first active layer composed of a polysilicon material, a first gate electrode overlapping the first active layer such that a first gate insulating layer is interposed therebetween, a first source electrode and a first drain electrode. The first gate electrode includes n layers. The first source electrode and the first drain electrode are connected to the first active layer. The second thin-film transistor includes a second active layer composed of a polysilicon material, a second gate electrode overlapping the second active layer such that a first gate insulating layer is interposed therebetween, a second source electrode and a second drain electrode. The second gate electrode includes n+1 layers. The second source electrode and the second drain electrode are connected to the second active layer.Type: ApplicationFiled: July 6, 2020Publication date: January 7, 2021Applicant: LG Display Co., Ltd.Inventors: Seong-Pil CHO, Dong-Yup KIM, Kyung-Mo SON, Sang-Soon NOH, Jun-Seuk LEE, Yong-Bin KANG, Kye-Chul CHOI, Sung-Ho MOON, Sang-Gul LEE, Byeong-Keun KIM, Kyoung-Soo LEE, Hyun-Gyo JEONG, Jin-Kyu ROH, Jung-Doo JIN, Ki-Hyun KWON, Hee-Jin JUNG, Jang-Dae KIM, Won-Ho SON, Chan-Ho KIM
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Patent number: 8278664Abstract: Provided are an organic light emitting display device (OLED) and a method of fabricating the same. When a electrically conductive line and a gate electrode are formed at the same time or when a first electrode is formed, interconnections for electrically connecting elements are formed. Thus, the number of used masks can be reduced, so that the overall fabrication process can be shortened and the production cost can be reduced.Type: GrantFiled: June 22, 2006Date of Patent: October 2, 2012Assignee: Samsung Display Co., Ltd.Inventors: Eui-Hoon Hwang, Sang-Gul Lee
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Patent number: 8273638Abstract: Provided is a thin film transistor that may be manufactured using Metal Induced Crystallization (MIC) and method for fabricating the same. Also provided is an active matrix flat panel display using the thin film transistor, which may be created by forming a crystallization inducing metal layer below a buffer layer and diffusing the crystallization inducing metal layer. The thin film transistor may include a crystallization inducing metal layer formed on an insulating substrate, a buffer layer formed on the crystallization inducing metal layer, and an active layer formed on the buffer layer and including source/drain regions, and including polycrystalline silicon crystallized by the MIC process.Type: GrantFiled: January 2, 2008Date of Patent: September 25, 2012Assignee: Samsung Mobile Display Co., Ltd.Inventors: Jae-Bon Koo, Sang-Gul Lee
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Methods of fabricating thin film transistor and organic light emitting display device using the same
Patent number: 7915102Abstract: Methods of fabricating a TFT and an OLED using the same are provided. The method of fabricating a CMOS TFT includes: preparing a substrate having first and second TFT regions; forming a gate electrode on the substrate; forming a gate insulating layer on the entire surface of the substrate including the gate electrode; forming a semiconductor layer on a predetermined region of the gate insulating layer using a mask; exposing the back of the mask using the gate electrode; injecting n-type impurity ions into the semiconductor layers of the first and second TFT regions using the back-exposed mask and forming a channel region and source and drain regions; ashing both sides of the back-exposed mask; injecting low concentration impurity ions into the semiconductor layers of the first and second TFT regions using the ashed mask and forming an LDD region; and injecting p-type impurity ions into the semiconductor layer of the second TFT region and forming source and drain regions.Type: GrantFiled: June 22, 2006Date of Patent: March 29, 2011Assignee: Samsung Mobile Display Co., Ltd.Inventors: Eui-Hoon Hwang, Sang-Gul Lee -
Patent number: 7910414Abstract: A method of fabricating an array substrate includes sequentially forming a first metal layer, a first inorganic insulating layer and an intrinsic amorphous silicon layer on a substrate, the first metal layer including a first metallic material layer and a second metallic material layer; crystallizing the intrinsic amorphous silicon; forming a gate electrode, a gate line, a gate insulating layer and an active layer; forming an interlayer insulating layer including first and second contact holes respectively exposing both sides of the active layer; forming first and second ohmic contact patterns respectively contacting the both sides of the active layers, a source electrode, a drain electrode, and a data line connecting the source electrode; forming a passivation layer on the source electrode, the drain electrode; and forming a pixel electrode on the passivation layer and contacting the drain electrode.Type: GrantFiled: November 20, 2009Date of Patent: March 22, 2011Assignee: LG Display Co., Ltd.Inventors: Hee-Dong Choi, Sang-Gul Lee, Seong-Moh Seo, Jun-Min Lee, Byung-Chul Ahn
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Patent number: 7842563Abstract: A thin film transistor may include an active layer formed on an insulating substrate and formed with source/drain regions and a channel region; a gate insulating film formed on the active layer; and a gate electrode formed on the gate insulating film. The gate electrode may be formed of a conductive metal film pattern and a conductive oxide film covering the conductive metal film pattern. The source/drain regions may include an LDD region, and the LDD region may at least partially overlap with the gate electrode.Type: GrantFiled: May 22, 2007Date of Patent: November 30, 2010Assignee: Samsung Mobile Display Co., Ltd.Inventors: Jae-Bon Koo, Sang-Gul Lee
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Publication number: 20100291741Abstract: A method of fabricating an array substrate includes sequentially forming a first metal layer, a first inorganic insulating layer and an intrinsic amorphous silicon layer on a substrate, the first metal layer including a first metallic material layer and a second metallic material layer; crystallizing the intrinsic amorphous silicon; forming a gate electrode, a gate line, a gate insulating layer and an active layer; forming an interlayer insulating layer including first and second contact holes respectively exposing both sides of the active layer; forming first and second ohmic contact patterns respectively contacting the both sides of the active layers, a source electrode, a drain electrode, and a data line connecting the source electrode; forming a passivation layer on the source electrode, the drain electrode; and forming a pixel electrode on the passivation layer and contacting the drain electrode.Type: ApplicationFiled: November 20, 2009Publication date: November 18, 2010Inventors: Hee-Dong Choi, Sang-Gul Lee, Seong-Moh Seo, Jun-Min Lee, Byung-Chui Ahn
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Publication number: 20080102550Abstract: Provided is a thin film transistor that may be manufactured using Metal Induced Crystallization (MIC) and method for fabricating the same. Also provided is an active matrix flat panel display using the thin film transistor, which may be created by forming a crystallization inducing metal layer below a buffer layer and diffusing the crystallization inducing metal layer. The thin film transistor may include a crystallization inducing metal layer formed on an insulating substrate, a buffer layer formed on the crystallization inducing metal layer, and an active layer formed on the buffer layer and including source/drain regions, and including polycrystalline silicon crystallized by the MIC process.Type: ApplicationFiled: January 2, 2008Publication date: May 1, 2008Applicant: SAMSUNG SDI CO., LTD.Inventors: Jae-Bon Kook, Sang-Gul Lee
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Patent number: 7335917Abstract: Provided is a thin film transistor that may be manufactured using Metal Induced Crystallization (MIC) and method for fabricating the same. Also provided is an active matrix flat panel display using the thin film transistor, which may be created by forming a crystallization inducing metal layer below a buffer layer and diffusing the crystallization inducing metal layer. The thin film transistor may include a crystallization inducing metal layer formed on an insulating substrate, a buffer layer formed on the crystallization inducing metal layer, and an active layer formed on the buffer layer and including source/drain regions, and including polycrystalline silicon crystallized by the MIC process.Type: GrantFiled: November 22, 2004Date of Patent: February 26, 2008Assignee: Samsung SDI Co., Ltd.Inventors: Jae-Bon Koo, Sang-Gul Lee
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Publication number: 20070224744Abstract: A thin film transistor may include an active layer formed on an insulating substrate and formed with source/drain regions and a channel region; a gate insulating film formed on the active layer; and a gate electrode formed on the gate insulating film. The gate electrode may be formed of a conductive metal film pattern and a conductive oxide film covering the conductive metal film pattern. The source/drain regions may include an LDD region, and the LDD region may at least partially overlap with the gate electrode.Type: ApplicationFiled: May 22, 2007Publication date: September 27, 2007Applicant: SAMSUNG SDI CO., LTD.Inventors: Jae-Bon Koo, Sang-Gul Lee
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Patent number: 7235850Abstract: A thin film transistor may include an active layer formed on an insulating substrate and formed with source/drain regions and a channel region; a gate insulating film formed on the active layer; and a gate electrode formed on the gate insulating film. The gate electrode may be formed of a conductive metal film pattern and a conductive oxide film covering the conductive metal film pattern. The source/drain regions may include an LDD region, and the LDD region may at least partially overlap with the gate electrode.Type: GrantFiled: November 19, 2004Date of Patent: June 26, 2007Assignee: Samsung SDI Co., Ltd.Inventors: Jae-Bon Koo, Sang-Gul Lee
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Publication number: 20060290828Abstract: Provided are an organic light emitting display device (OLED) and a method of fabricating the same. When a electrically conductive line and a gate electrode are formed at the same time or when a first electrode is formed, interconnections for electrically connecting elements are formed. Thus, the number of used masks can be reduced, so that the overall fabrication process can be shortened and the production cost can be reduced.Type: ApplicationFiled: June 22, 2006Publication date: December 28, 2006Inventors: Eui-Hoon Hwang, Sang-Gul Lee
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Methods of fabricating thin film transistor and organic light emitting display device using the same
Publication number: 20060292763Abstract: Methods of fabricating a TFT and an OLED using the same are provided. The method of fabricating a CMOS TFT includes: preparing a substrate having first and second TFT regions; forming a gate electrode on the substrate; forming a gate insulating layer on the entire surface of the substrate including the gate electrode; forming a semiconductor layer on a predetermined region of the gate insulating layer using a mask; exposing the back of the mask using the gate electrode; injecting n-type impurity ions into the semiconductor layers of the first and second TFT regions using the back-exposed mask and forming a channel region and source and drain regions; ashing both sides of the back-exposed mask; injecting low concentration impurity ions into the semiconductor layers of the first and second TFT regions using the ashed mask and forming an LDD region; and injecting p-type impurity ions into the semiconductor layer of the second TFT region and forming source and drain regions.Type: ApplicationFiled: June 22, 2006Publication date: December 28, 2006Inventors: Eui-Hoon Hwang, Sang-Gul Lee -
Patent number: 6909477Abstract: Barrier lines are formed on a substrate to define column areas between adjacent barrier lines. A color filter is then formed using continuous ink ejection in at least one of the column areas.Type: GrantFiled: January 28, 2000Date of Patent: June 21, 2005Assignee: LG. Philips LCD Co., LTDInventors: Jong Hoon Yi, Jeong Hyun Kim, Sang Hun Oh, Soo Mahn Kim, Sang Gul Lee
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Publication number: 20050116292Abstract: Provided is a thin film transistor that may be manufactured using Metal Induced Crystallization (MIC) and method for fabricating the same. Also provided is an active matrix flat panel display using the thin film transistor, which may be created by forming a crystallization inducing metal layer below a buffer layer and diffusing the crystallization inducing metal layer. The thin film transistor may include a crystallization inducing metal layer formed on an insulating substrate, a buffer layer formed on the crystallization inducing metal layer, and an active layer formed on the buffer layer and including source/drain regions, and including polycrystalline silicon crystallized by the MIC process.Type: ApplicationFiled: November 22, 2004Publication date: June 2, 2005Inventors: Jae-Bon Koo, Sang-Gul Lee