Abstract: A technique is described for determining the performance of substrate-side emitting VCSELs formed on a wafer. The technique involves forming top-emitting VCSELs on the same wafer as bottom-emitting VCSELs and then testing the top-emitting VCSELs and using the results to determine the performance of the bottom-emitting VCSELs of the wafer.

Abstract: An integrated semiconductor device is formed from two fabricated semiconductor devices each having a substrate by placing an etch-resist on the substrate of the one semiconductor device, by bonding the conductors of one of the fabricated semiconductor devices to the conductors of the other fabricated semiconductor device, flowing an uncured cement (e.g. epoxy) between the etch-resist and the other substrate, allowing the cement to solidify, and removing the substrate from the one of the semiconductor devices. More specifically, a hybrid semiconductor device is formed from a GaAs/AlGaAs multiple quantum well modulator having a substrate and an IC chip having a substrate by placing an etch resist on the modulator substrate, bonding the conductors of the modulator to the conductors of the chip, wicking an uncured epoxy between the modulators and the chip, allowing the epoxy to cure, and removing the substrate from the modulator.

Abstract: A technique is described for determining the performance of substrate-side emitting VCSELs formed on a wafer. The technique involves forming top-emitting VCSELs on the same wafer as bottom-emitting VCSELs and then testing the top-emitting VCSELs and using the results to determine the performance of the bottom-emitting VCSELs of the wafer.

Abstract: A technique is described for determining the performance of substrate-side emitting VCSELs formed on a wafer. The technique involves forming top-emitting VCSELs on the same wafer as bottom-emitting VCSELs and then testing the top-emitting VCSELs and using the results to determine the performance of the bottom-emitting VCSELs of the wafer.

Abstract: In a multi-layered dielectric mirror the higher refractive index layers comprise ZnS and the lower refractive index layers comprise a composite of approximately 95%MgF2 and 5%CaF2 by mole fraction. In one embodiment, the fluoride layers are e-beam deposited from an essentially eutectic melt of the two fluorides. In another embodiment, the semiconductor surface on which the mirror is formed is protected by an aluminum borosilicate glass layer. Application of the invention to the design and fabrication of VCSELs is also described.

Abstract: A process for device fabrication is disclosed in which two substrates having different crystal lattices are bound together. In the process the substrate surfaces are placed in physical contact with each other. A flexible membrane is placed in physical contact with a surface of one of the substrates. Pneumatic force is applied to the flexible membrane. The duration of the contact and the pressure of the contact are selected to facilitate a bond between the two substrate surfaces that results from attractive Van der Waals' forces between the two surfaces. The bulk of one of the substrates is then typically removed. Thereafter, the bonded surfaces are heated to a high temperature to effect a permanent bond.

Abstract: A VCSEL comprises separate current and optical guides that provide unique forms of drive current and transverse mode confinement, respectively. In one embodiment, the optical guide comprises an intracavity high refractive index mesa disposed transverse to the cavity resonator axis and a multi-layered dielectric (i.e., non-epitaxial) mirror overlaying the mesa. In another embodiment, the current guide comprises an annular first electrode which laterally surrounds the mesa but has an inside diameter which is greater than that of an ion-implantation-defined current aperture. The current guide causes current to flow laterally from the first electrode along a first path segment which is essentially perpendicular to the resonator axis, then vertically from the first segment along a second path segment essentially parallel to that axis, and finally through the current aperture and the active region to a second electrode.

Abstract: A process for device fabrication is disclosed in which two substrates having different crystal lattices are bound together. In the process the substrate surfaces are thoroughly cleaned and placed in physical contact with each other. The duration of the contact and the pressure of the contact are selected to facilitate a bond between the two substrate surfaces that results from attractive Van der Waals' forces between the two surfaces. The bonded substrates are heated to a moderate temperature to effect escape of gases which may be entrapped by the substrates. The bulk of one of the substrates is then typically removed. The substrates can be heated again to a moderate temperature to effect removal of any gases remaining entrapped on the substrates. Thereafter, the bonded surfaces are heated to a high temperature to effect a permanent bond.

Abstract: An integrated semiconductor device is formed from two fabricated semiconductor devices each having a substrate by placing an etch-resist on the substrate of the one semiconductor device, by bonding the conductors of one of the fabricated semiconductor devices to the conductors of the other fabricated semiconductor device, flowing an uncured cement (e.g. epoxy) between the etch-resist and the other substrate, allowing the cement to solidify, and removing the substrate from the one of the semiconductor devices. More specifically, a hybrid semiconductor device is formed from a GaAs/AlGaAs multiple quantum well modulator having a substrate and an IC chip having a substrate by placing an etch resist on the modulator substrate, bonding the conductors of the modulator to the conductors of the chip, wicking an uncured epoxy between the modulators and the chip, allowing the epoxy to cure, and removing the substrate from the modulator.

Abstract: Each microminiature contact pad included in a dense array of pads on an electronic component contains a relatively thick layer of solder. The layer is treated to form a relatively thin brittle protective layer on the surface of the solder. The structure is then brought into contact with a contact pad in a mating array of pads on another component in a thermo-compression bonding step carried out below the melting point of the solder. In that step, the brittle layer is fractured. As a result, solid-state diffusion of conductive material occurs through fissures in the fractured layer, thereby to provide an electrical connection between mating pads on the two components.

Abstract: Solder bonding of first and second contact pad arrays is accomplished by forming contact structures, such as posts with vertical or tapered sides, on the contact pads of the first array and solder bumps on the second array. The respective contact structures should have an average cross-sectional area that is less than the average cross-sectional area of the corresponding solder bumps. The contact structures and solder bumps are then bonded by a bonding process at a temperature and pressure where the solder bumps deform and envelop at least a portion of the respective contact structures. It is possible to employ the contact structures as a compression stop during the bonding process. The temperature should be below the melting points of the contact structures. In this manner, solder bump spreading can be reduced during bonding which correspondingly reduces electrical shorting of adjacent formed interconnect bonds.