Abstract: A semiconductor memory device includes a cell unit including a stack structure and a channel structure penetrating through the stack structure, the stack structure including at least one string selection gate and a plurality of cell gates, cell separation structures separating the cell unit in a first direction, and gate cutting structures defining regions within the cell unit between adjacent cell separation structures. The cell unit includes a first region defined between a first cell separation structure and a first gate cutting structure and a second region defined between the first gate cutting structure and a second gate cutting structure. A ratio of a region of the at least one string selection gate that is occupied by a conductive material in the second region is greater than a ratio of a region of at least one cell gate that is occupied by the conductive material in the second region.

Abstract: The present disclosure relates to a polymer-iron oxide composite nanoparticle, a polymer-iron oxide composite nanoparticle including a silica coating layer coated on the surface of the polymer-iron oxide composite nanoparticle, a DNA-containing polymer-iron oxide composite nanostructure including DNA attached on the silica coating layer, a method of preparing the same and a method of controlling expression of a gene.

Abstract: The present disclosure relates to a polymer-iron oxide composite nanoparticle, a polymer-iron oxide composite nanoparticle including a silica coating layer coated on the surface of the polymer-iron oxide composite nanoparticle, a DNA-containing polymer-iron oxide composite nanostructure including DNA attached on the silica coating layer, a method of preparing the same and a method of controlling expression of a gene.