Abstract: Provided are an apparatus and method for verifying forgery and tampering of a medical image. An apparatus for verifying forgery and tampering of a medical image according to an embodiment disclosed in this document includes a memory configured to store Digital Imaging and Communications in Medicine (DICOM) files for each patient, and a processor functionally connected to the memory, wherein, when an issuance request of a DICOM file is received, search for a DICOM file corresponding to the request among DICOM files for each patient; generate an issuance number related to the issuance; extract some information from metadata of the searched DICOM file; generate a first hash value using the some information and the issuance number; and upon providing a copy of the DICOM file to an external storage device, insert the first hash value as forgery verification information into a specified tag area of the copy.

Abstract: An apparatus and method for predicting a friction coefficient of a road surface are disclosed. The apparatus includes a microphone that obtains a sound signal around a tire mounted on a vehicle, and a controller that estimates a state and a type of the road surface and a degree of tire wear corresponding to the sound signal around the tire based on a first deep learning model, estimates a peak adjustment factor and an initial inclination adjustment factor of a friction coefficient curve corresponding to the state and the type of the road surface and the degree of tire wear based on a second deep learning model, and predicts the friction coefficient based on the peak adjustment factor and the initial inclination adjustment factor of the friction coefficient curve.

Abstract: A transition dichalcogenide homojunction structure may include a lower high resistance layer including a plurality of PtX2 layers and an upper low resistance layer which includes the plurality of PtX2 layers and has different thickness and number of growth layers from the lower high resistance layer. And the lower high resistance layer and the upper low resistance layer may form a homojunction. The heat transfer characteristic of the lower high resistance layer may increase by the interface induced Seebeck effect with the upper low resistance layer. The transition dichalcogenide homojunction structure may generate the interface induced Seebeck effect at the interface of the homojunction to generate a thermal voltage. Further, the transition metal dichalcogenide homojunction structure may measure the Seebeck effect of the lower high resistance layer using the upper low resistance layer without separate measurement equipment.

Abstract: A transition dichalcogenide homojunction structure may include a lower high resistance layer including a plurality of PtX2 layers and an upper low resistance layer which includes the plurality of PtX2 layers and has different thickness and number of growth layers from the lower high resistance layer. And the lower high resistance layer and the upper low resistance layer may form a homojunction. The heat transfer characteristic of the lower high resistance layer may increase by the interface induced Seebeck effect with the upper low resistance layer. The transition dichalcogenide homojunction structure may generate the interface induced Seebeck effect at the interface of the homojunction to generate a thermal voltage. Further, the transition metal dichalcogenide homojunction structure may measure the Seebeck effect of the lower high resistance layer using the upper low resistance layer without separate measurement equipment.

Abstract: An apparatus and method for predicting a friction coefficient of a road surface are disclosed. The apparatus includes a microphone that obtains a sound signal around a tire mounted on a vehicle, and a controller that estimates a state and a type of the road surface and a degree of tire wear corresponding to the sound signal around the tire based on a first deep learning model, estimates a peak adjustment factor and an initial inclination adjustment factor of a friction coefficient curve corresponding to the state and the type of the road surface and the degree of tire wear based on a second deep learning model, and predicts the friction coefficient based on the peak adjustment factor and the initial inclination adjustment factor of the friction coefficient curve.

Abstract: The present specification relates to an organic-inorganic hybrid solar cell including a first electrode, a first light absorbing layer provided on the first electrode, a second light absorbing layer provided on the first light absorbing layer, and a second electrode provided on the second light absorbing layer, in which the first light absorbing layer and the second light absorbing layer have different phase transition temperatures.

Abstract: A method for manufacturing an organic-inorganic hybrid solar cell, the method including forming a first electrode, forming a first common layer on the first electrode, forming a first light absorbing layer by applying a first perovskite precursor solution including a first organic halide and a first metal halide on the first common layer, forming a second light absorbing layer by applying a second perovskite precursor solution including a second organic halide on the first light absorbing layer, forming a second common layer on the second light absorbing layer; and forming a second electrode on the second common layer.

Abstract: A semiconductor device may include a first buffer, a second buffer, a divider circuit and an internal signal generation circuit. The first buffer may buffer a first input signal and a second input signal to generate a first data strobe buffering signal and a first data strobe bar buffering signal. The second buffer may generate a second data strobe buffering signal based on the first input signal and a reference xvoltage. The divider circuit may divide the second data strobe buffering signal to generate a divided signal and a divided bar signal. The internal signal generation circuit may be configured to generate a first to fourth data latch timing signals having different phases based on the first data strobe buffering signal, the first data strobe bar buffering signal, the divided signal and the divided buffering signal.

Abstract: The present specification relates to an organic-inorganic hybrid solar cell.

Abstract: A semiconductor device may include a first buffer, a second buffer, a divider circuit and an internal signal generation circuit. The first buffer may buffer a first input signal and a second input signal to generate a first data strobe buffering signal and a first data strobe bar buffering signal. The second buffer may generate a second data strobe buffering signal based on the first input signal and a reference xvoltage. The divider circuit may divide the second data strobe buffering signal to generate a divided signal and a divided bar signal. The internal signal generation circuit may be configured to generate a first to fourth data latch timing signals having different phases based on the first data strobe buffering signal, the first data strobe bar buffering signal, the divided signal and the divided buffering signal.

Abstract: A semiconductor device may include a first buffer, a second buffer, a divider circuit and an internal signal generation circuit. The first buffer may buffer a first input signal and a second input signal to generate a first data strobe buffering signal and a first data strobe bar buffering signal. The second buffer may generate a second data strobe buffering signal based on the first input signal and a reference voltage. The divider circuit may divide the second data strobe buffering signal to generate a divided signal and a divided bar signal. The internal signal generation circuit may be configured to generate a first to fourth data latch timing signals having different phases based on the first data strobe buffering signal, the first data strobe bar buffering signal, the divided signal and the divided buffering signal.

Abstract: A semiconductor device may include a first buffer, a second buffer, a divider circuit and an internal signal generation circuit. The first buffer may buffer a first input signal and a second input signal to generate a first data strobe buffering signal and a first data strobe bar buffering signal. The second buffer may generate a second data strobe buffering signal based on the first input signal and a reference voltage. The divider circuit may divide the second data strobe buffering signal to generate a divided signal and a divided bar signal. The internal signal generation circuit may be configured to generate a first to fourth data latch timing signals having different phases based on the first data strobe buffering signal, the first data strobe bar buffering signal, the divided signal and the divided buffering signal.

Abstract: A method for manufacturing an organic-inorganic hybrid solar cell, the method including forming a first electrode, forming a first common layer on the first electrode, forming a first light absorbing layer by applying a first perovskite precursor solution including a first organic halide and a first metal halide on the first common layer, forming a second light absorbing layer by applying a second perovskite precursor solution including a second organic halide on the first light absorbing layer, forming a second common layer on the second light absorbing layer; and forming a second electrode on the second common layer.

Abstract: The present specification relates to an organic-inorganic hybrid solar cell including a first electrode, a first light absorbing layer provided on the first electrode, a second light absorbing layer provided on the first light absorbing layer, and a second electrode provided on the second light absorbing layer, in which the first light absorbing layer and the second light absorbing layer have different phase transition temperatures.

Abstract: A semiconductor device may include a first buffer, a second buffer, a divider circuit and an internal signal generation circuit. The first buffer may buffer a first input signal and a second input signal to generate a first data strobe buffering signal and a first data strobe bar buffering signal. The second buffer may generate a second data strobe buffering signal based on the first input signal and a reference voltage. The divider circuit may divide the second data strobe buffering signal to generate a divided signal and a divided bar signal. The internal signal generation circuit may be configured to generate a first to fourth data latch timing signals having different phases based on the first data strobe buffering signal, the first data strobe bar buffering signal, the divided signal and the divided buffering signal.

Abstract: The present specification relates to an organic-inorganic hybrid solar cell.

Abstract: Semiconductor memory devices are provided. The semiconductor memory device includes an input/output (I/O) drive controller, a data I/O unit and a data transmitter. The input/output (I/O) drive controller generates drive control signals and an input control signal for driving first and second global I/O lines in a first test mode or a second test mode. The data I/O unit drives the first global I/O line in response to an input data when a write operation is executed in the first test mode. The data transmitter transfers the data on the first global I/O line onto first and second local I/O lines to store the data on the first global I/O line in a memory cell array portion when the write operation is executed in the first test mode. Related methods are also provided.

Abstract: Semiconductor memory devices are provided. The semiconductor memory device includes an input/output (I/O) drive controller, a data I/O unit and a data transmitter. The input/output (I/O) drive controller generates drive control signals and an input control signal for driving first and second global I/O lines in a first test mode or a second test mode. The data I/O unit drives the first global I/O line in response to an input data when a write operation is executed in the first test mode and to drive the first and second global I/O lines in response to the drive control signals when the write operation is executed in the second test mode. The data transmitter transfers the data on the first global I/O line onto first and second local I/O lines to store the data on the first global I/O line in a memory cell array portion when the write operation is executed in the first test mode.

Abstract: A semiconductor device includes a decoded signal generation circuit suitable for executing a counting operation to generate a decoded signal in response to an oscillation signal during a refresh section, a refresh pulse generation circuit suitable for generating a refresh pulse for executing a refresh operation in response to the decoded signal and a temperature code, and a reset pulse generation circuit suitable for generating a reset pulse initializing the decoded signal in response to the refresh pulse.

Abstract: A semiconductor device includes a decoded signal generation circuit suitable for executing a counting operation to generate a decoded signal in response to an oscillation signal during a refresh section, a refresh pulse generation circuit suitable for generating a refresh pulse for executing a refresh operation in response to the decoded signal and a temperature code, and a reset pulse generation circuit suitable for generating a reset pulse initializing the decoded signal in response to the refresh pulse.