Abstract: An apparatus and method for measuring air currents on the surface of a substrate, which can accurately measure the magnitude and direction of air currents on the surface of a wafer with wafer-type air current measurement sensors, are provided. The apparatus includes: a first air current measurement module measuring a magnitude of air currents on a surface of a first substrate, which is processed in accordance with a semiconductor manufacturing process; a second air current measurement module measuring a movement direction of the air currents; and a power module supplying power to the first and second air current measurement modules, wherein the first air current measurement module, the second air current measurement module, and the power module are mounted on a second substrate, which has the same shape as the first substrate.

Abstract: An apparatus for manufacturing a pouch-type rechargeable battery includes a preforming portion forming a folding groove in a portion of a protrusion of the pouch-type rechargeable battery, a folding portion disposed on a rear end of the preforming portion and folding the protrusion along the folding groove, a rolling portion disposed on a rear end of the folding portion and pressing the folded protrusion, and a pressing portion disposed on a rear end of the rolling portion and fixing the folded protrusion.

Abstract: An apparatus for predicting performance of a wheel in a vehicle: includes a learning device that generates a latent space for a plurality of two-dimensional (2D) wheel images based on a convolutional autoencoder (CAE), extracts a predetermined number of the plurality of 2D wheel images from the latent space, and learns a dataset having the plurality of 2D wheel images and performance values corresponding to the plurality of 2D wheel images; and a controller that predicts performance for the plurality of 2D wheel images based on a performance prediction model obtained by the learning device.

Abstract: Disclosed herein is a method of depositing a transition metal single-atom catalyst including preparing a carbon carrier, and depositing a transition metal single-atom catalyst on the carbon carrier, in which the carbon carrier is surface-treated by an oxidation process, and wherein the deposition is carried out by an arc plasma process.

Abstract: A hair dye dispenser according to an embodiment of the present invention includes a housing having an opening hole formed on one side of which a hair dye is provided, a plurality of cartridges disposed inside the housing and accommodating at least one dyeing material, a main body in which the plurality of cartridges are rotatably disposed, a main motor for rotating the main body so that a first cartridge of the plurality of cartridges is located adjacent to the opening hole, a discharge module for discharging the dyeing material contained in the first cartridge, and an accommodating body in which a basket accommodating the dyeing material discharged by the discharge module is placed, wherein the discharge module may include an elevating body that pressurizes the first cartridge when moving up and is separated from the first cartridge when moving down.

Abstract: An electronic device according to one example of the present invention comprises: a proximity sensor for generating proximity information on an object which approaches the electronic device; an iris sensor for detecting an iris; and a first processor for controlling the electronic device, wherein the first processor can be set to: determine the distance between the electronic device and the object on the basis of the proximity information generated by the proximity sensor; detect the iris by using the iris sensor when the distance between the electronic device and the object is greater than a first reference value; and inactivate the iris sensor when the distance between the electronic device and the object is less than or equal to the first reference value. In addition, other examples are possible.

Abstract: An electronic device according to one example of the present invention comprises: a proximity sensor for generating proximity information on an object which approaches the electronic device; an iris sensor for detecting an iris; and a first processor for controlling the electronic device, wherein the first processor can be set to: determine the distance between the electronic device and the object on the basis of the proximity information generated by the proximity sensor; detect the iris by using the iris sensor when the distance between the electronic device and the object is greater than a first reference value; and inactivate the iris sensor when the distance between the electronic device and the object is less than or equal to the first reference value. In addition, other examples are possible.

Abstract: A method for operating an electronic device including a sensor unit that uses infrared rays is provided. In the method, a light source is illuminated using at least one light emitting device. Whether the illuminated light source is received by a light receiving device including at least one light receiving channel is determined. A relevant function corresponding to an amount of light of the light source received by the at least one light receiving channel is performed.

Abstract: A method for operating an electronic device including a sensor unit that uses infrared rays is provided. In the method, a light source is illuminated using at least one light emitting device. Whether the illuminated light source is received by a light receiving device including at least one light receiving channel is determined. A relevant function corresponding to an amount of light of the light source received by the at least one light receiving channel is performed.

Abstract: A method for fabricating a variable resistance memory device in accordance with an embodiment of the present invention includes: sequentially forming a first conductive layer and a variable resistance layer on a substrate; forming stacked structures in which first conductive lines and variable resistance lines are sequentially stacked by selectively etching the variable resistance layer and the first conductive layer; forming an insulating layer to fill a space between the stacked structures; forming a second conductive layer on the insulating layer and the stacked structures; and forming a second conductive line and a variable resistance pattern by etching the second conductive layer and the variable resistance line using mask patterns in a line type extending in a direction intersecting the stacked structures.

Abstract: A memory device including variable resistance elements comprises a plurality of memory cells configured to store data; a first signal transmission/reception unit and a second signal transmission/reception unit configured to transmit a signal to the memory cells or receive a signal from the memory cells; a first transmission line arranged to couple first ends of the memory cells to the first signal transmission/reception unit; and a second transmission line configured to couple second ends of the memory cells to the second signal transmission/reception unit, wherein a first resistance of a first signal path coupled between the first and second signal transmission/reception units through a first memory cell of the memory cells is substantially equal to a second electrical resistance of a second signal path coupled between a second memory cell and the first and second signal transmission/reception units through a second memory cell of the memory cells.

Abstract: A method for fabricating a variable resistance memory device in accordance with an embodiment of the present invention includes: sequentially forming a first conductive layer and a variable resistance layer on a substrate; forming stacked structures in which first conductive lines and variable resistance lines are sequentially stacked by selectively etching the variable resistance layer and the first conductive layer; forming an insulating layer to fill a space between the stacked structures; forming a second conductive layer on the insulating layer and the stacked structures; and forming a second conductive line and a variable resistance pattern by etching the second conductive layer and the variable resistance line using mask patterns in a line type extending in a direction intersecting the stacked structures.

Abstract: A variable resistance memory device includes a first trench extending in a first direction formed in a first insulation layer, a first conductive layer in the first trench, a protective layer over the first conductive layer in the first trench, a second insulation layer over the first insulation layer and the protective layer, a second trench formed in the second insulation layer and extending in a second direction that crosses the first direction, a gap formed in the protective layer exposing the first conductive layer at an intersection between the first trench and the second trench, a variable resistance layer positioned in the gap and coupled to the first conductive layer, and a second conductive layer formed in the second trench and coupled to the variable resistance layer.

Abstract: A memory device including variable resistance elements comprises a plurality of memory cells configured to store data; a first signal transmission/reception unit and a second signal transmission/reception unit configured to transmit a signal to the memory cells or receive a signal from the memory cells; a first transmission line arranged to couple first ends of the memory cells to the first signal transmission/reception unit; and a second transmission line configured to couple second ends of the memory cells to the second signal transmission/reception unit, wherein a first resistance of a first signal path coupled between the first and second signal transmission/reception units through a first memory cell of the memory cells is substantially equal to a second electrical resistance of a second signal path coupled between a second memory cell and the first and second signal transmission/reception units through a second memory cell of the memory cells.

Abstract: A semiconductor memory device using a diode as a switching device is disclosed. The switching device may enhance on and off characteristics at the same time. The switching device includes a diode including a first conductive layer and a second conductive layer stacked therein, where the first conductive layer and the second conductive layer have complementary conductive types to each other, a control electrode surrounding the first conductive layer, and an insulation layer disposed between the first conductive layer and the control electrode.

Abstract: A memory device including variable resistance elements comprises a plurality of memory cells configured to store data; a first signal transmission/reception unit and a second signal transmission/reception unit configured to transmit a signal to the memory cells or receive a signal from the memory cells; a first transmission line arranged to couple first ends of the memory cells to the first signal transmission/reception unit; and a second transmission line configured to couple second ends of the memory cells to the second signal transmission/reception unit, wherein a first resistance of a first signal path coupled between the first and second signal transmission/reception units through a first memory cell of the memory cells is substantially equal to a second electrical resistance of a second signal path coupled between a second memory cell and the first and second signal transmission/reception units through a second memory cell of the memory cells.

Abstract: Disclosed herein is a semiconductor memory device for reducing a junction resistance and increasing amount of current throughout the unit cell. A semiconductor memory device comprises plural unit cells, each coupled to contacts formed in different shape at both sides of a word line in a cell array.

Abstract: Disclosed herein is a semiconductor memory device for reducing a junction resistance and increasing amount of current throughout the unit cell. A semiconductor memory device comprises plural unit cells, each coupled to contacts formed in different shape at both sides of a word line in a cell array.

Abstract: Disclosed herein is a semiconductor memory device including floating body cells. The semiconductor memory device includes memory cell active regions formed on a Silicon-On Isolator (SOI) semiconductor substrate, a plurality of floating body cell transistors formed in the memory cell active regions, and “inactive transistors” for providing cell isolation that are formed between the plurality of floating body cell transistors. Here, the inactive transistors for providing cell isolation are controlled so that they always are in an OFF state while the semiconductor memory device is operating.

Abstract: Disclosed herein is a semiconductor memory device including floating body cells. The semiconductor memory device includes memory cell active regions formed on a Silicon-On Isolator (SOI) semiconductor substrate, a plurality of floating body cell transistors formed in the memory cell active regions, and inactive transistors for providing cell isolation that are formed between the plurality of floating body cell transistors. Here, the inactive transistors for providing cell isolation are controlled so that they always are in an OFF state while the semiconductor memory device is operating.