Patents by Inventor Sang-pil Sim

Sang-pil Sim has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11955517
    Abstract: A semiconductor device can include a field insulation layer including a planar major surface extending in first and second orthogonal directions and a protruding portion that protrudes a particular distance from the major surface relative to the first and second orthogonal directions. First and second multi-channel active fins can extend on the field insulation layer, and can be separated from one another by the protruding portion. A conductive layer can extend from an uppermost surface of the protruding portion to cross over the protruding portion between the first and second multi-channel active fins.
    Type: Grant
    Filed: November 15, 2020
    Date of Patent: April 9, 2024
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Shigenobu Maeda, Hee-Soo Kang, Sang-Pil Sim, Soo-Hun Hong
  • Publication number: 20210066454
    Abstract: A semiconductor device can include a field insulation layer including a planar major surface extending in first and second orthogonal directions and a protruding portion that protrudes a particular distance from the major surface relative to the first and second orthogonal directions. First and second multi-channel active fins can extend on the field insulation layer, and can be separated from one another by the protruding portion. A conductive layer can extend from an uppermost surface of the protruding portion to cross over the protruding portion between the first and second multi-channel active fins.
    Type: Application
    Filed: November 15, 2020
    Publication date: March 4, 2021
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Shigenobu Maeda, Hee-Soo Kang, Sang-Pil Sim, Soo-Hun Hong
  • Patent number: 10861934
    Abstract: A semiconductor device can include a field insulation layer including a planar major surface extending in first and second orthogonal directions and a protruding portion that protrudes a particular distance from the major surface relative to the first and second orthogonal directions. First and second multi-channel active fins can extend on the field insulation layer, and can be separated from one another by the protruding portion. A conductive layer can extend from an uppermost surface of the protruding portion to cross over the protruding portion between the first and second multi-channel active fins.
    Type: Grant
    Filed: April 30, 2019
    Date of Patent: December 8, 2020
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Shigenobu Maeda, Hee-Soo Kang, Sang-Pil Sim, Soo-Hun Hong
  • Publication number: 20190259836
    Abstract: A semiconductor device can include a field insulation layer including a planar major surface extending in first and second orthogonal directions and a protruding portion that protrudes a particular distance from the major surface relative to the first and second orthogonal directions. First and second multi-channel active fins can extend on the field insulation layer, and can be separated from one another by the protruding portion. A conductive layer can extend from an uppermost surface of the protruding portion to cross over the protruding portion between the first and second multi-channel active fins.
    Type: Application
    Filed: April 30, 2019
    Publication date: August 22, 2019
    Inventors: Shigenobu Maeda, Hee-Soo Kang, Sang-Pil Sim, Soo-Hun Hong
  • Patent number: 10319814
    Abstract: A semiconductor device can include a field insulation layer including a planar major surface extending in first and second orthogonal directions and a protruding portion that protrudes a particular distance from the major surface relative to the first and second orthogonal directions. First and second multi-channel active fins can extend on the field insulation layer, and can be separated from one another by the protruding portion. A conductive layer can extend from an uppermost surface of the protruding portion to cross over the protruding portion between the first and second multi-channel active fins.
    Type: Grant
    Filed: March 23, 2017
    Date of Patent: June 11, 2019
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Shigenobu Maeda, Hee-Soo Kang, Sang-Pil Sim, Soo-Hun Hong
  • Patent number: 10269928
    Abstract: A semiconductor device includes a substrate including first to third fins aligned in a first direction, a first trench arranged between the first fin and the second fin, and a second trench arranged between the second fin and the third fin. The semiconductor device further includes a first field insulating film arranged in the first trench, a second field insulating film formed in the second trench, a first dummy gate arranged on the first field insulating film and a second dummy gate at least partly arranged on the second field insulating film. A lower surface of the second field insulating film is arranged to be lower than a lower surface of the first field insulating film.
    Type: Grant
    Filed: September 27, 2017
    Date of Patent: April 23, 2019
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Soo-Hun Hong, Hee-Soo Kang, Hyun-Jo Kim, Sang-Pil Sim, Hee-Don Jung
  • Patent number: 10002943
    Abstract: A semiconductor device includes a substrate including first to third fins aligned in a first direction, a first trench arranged between the first fin and the second fin, and a second trench arranged between the second fin and the third fin. The semiconductor device further includes a first field insulating film arranged in the first trench, a second field insulating film formed in the second trench, a first dummy gate arranged on the first field insulating film and a second dummy gate at least partly arranged on the second field insulating film. A lower surface of the second field insulating film is arranged to be lower than a lower surface of the first field insulating film.
    Type: Grant
    Filed: May 25, 2016
    Date of Patent: June 19, 2018
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Soo-Hun Hong, Hee-Soo Kang, Hyun-Jo Kim, Sang-Pil Sim, Hee-Don Jung
  • Publication number: 20180019321
    Abstract: A semiconductor device includes a substrate including first to third fins aligned in a first direction, a first trench arranged between the first fin and the second fin, and a second trench arranged between the second fin and the third fin. The semiconductor device further includes a first field insulating film arranged in the first trench, a second field insulating film formed in the second trench, a first dummy gate arranged on the first field insulating film and a second dummy gate at least partly arranged on the second field insulating film. A lower surface of the second field insulating film is arranged to be lower than a lower surface of the first field insulating film.
    Type: Application
    Filed: September 27, 2017
    Publication date: January 18, 2018
    Inventors: SOO-HUN HONG, HEE-SOO KANG, HYUN-JO KIM, SANG-PIL SIM, HEE-DON JUNG
  • Patent number: 9627483
    Abstract: A semiconductor device can include a field insulation layer including a planar major surface extending in first and second orthogonal directions and a protruding portion that protrudes a particular distance from the major surface relative to the first and second orthogonal directions. First and second multi-channel active fins can extend on the field insulation layer, and can be separated from one another by the protruding portion. A conductive layer can extend from an uppermost surface of the protruding portion to cross over the protruding portion between the first and second multi-channel active fins.
    Type: Grant
    Filed: August 19, 2014
    Date of Patent: April 18, 2017
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Shigenobu Maeda, Hee-Soo Kang, Sang-Pil Sim, Soo-Hun Hong
  • Patent number: 9536881
    Abstract: Semiconductor devices are provided. The semiconductor devices include a first fin; a first gate electrode intersecting the first fin; a first elevated source and/or drain on respective sides of the first gate electrode on the first fin; and a first field dielectric film adjacent the first fin. The first field dielectric film includes a first part below a top surface of the first fin and a second part protruding from the first part and above a top surface of the first fin that makes contact with the first elevated source and/or drain.
    Type: Grant
    Filed: April 23, 2014
    Date of Patent: January 3, 2017
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Shigenobu Maeda, Sung-Bong Kim, Chang-Wook Moon, Dong-Hun Lee, Hyung-Soon Jang, Sang-Pil Sim
  • Patent number: 9502413
    Abstract: A semiconductor device including source drain stressors is provided. The semiconductor device includes a gate structure including a gate insulating layer and a gate electrode on a semiconductor substrate. Gate spacers may be disposed on sidewalls of the gate structure and a stressor pattern including an impurity region is disposed on a side of the gate structure. The stressor pattern includes a protruded portion having a top surface higher than a bottom surface of the gate structure and a facet in the protruded portion. The facet is slanted at a predetermined angle with respect to an upper surface of the semiconductor substrate and forms a concave portion with one of the gate spacers. A blocking insulating layer may extend conformally on the stressor pattern and the gate spacers and an insulating wing pattern is disposed in the concave portion on the blocking insulating layer.
    Type: Grant
    Filed: August 17, 2015
    Date of Patent: November 22, 2016
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Se-Chan Lim, Sang-Pil Sim, Dong-Kyun Sohn, Su-Youn Yi
  • Publication number: 20160268393
    Abstract: A semiconductor device includes a substrate including first to third fins aligned in a first direction, a first trench arranged between the first fin and the second fin, and a second trench arranged between the second fin and the third fin. The semiconductor device further includes a first field insulating film arranged in the first trench, a second field insulating film formed in the second trench, a first dummy gate arranged on the first field insulating film and a second dummy gate at least partly arranged on the second field insulating film. A lower surface of the second field insulating film is arranged to be lower than a lower surface of the first field insulating film.
    Type: Application
    Filed: May 25, 2016
    Publication date: September 15, 2016
    Inventors: SOO-HUN HONG, HEE-SOO KANG, HYUN-JO KIM, SANG-PIL SIM, HEE-DON JUNG
  • Patent number: 9419077
    Abstract: A semiconductor device can include a field insulation layer including a planar major surface extending in first and second orthogonal directions and a protruding portion that protrudes a particular distance from the major surface relative to the first and second orthogonal directions. First and second multi-channel active fins can extend on the field insulation layer, and can be separated from one another by the protruding portion. A conductive layer can extend from an uppermost surface of the protruding portion to cross over the protruding portion between the first and second multi-channel active fins.
    Type: Grant
    Filed: August 13, 2014
    Date of Patent: August 16, 2016
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Shigenobu Maeda, Hee-Soo Kang, Sang-Pil Sim, Soo-Hun Hong
  • Publication number: 20160184439
    Abstract: The present invention relates to an oral dissolving film formulation containing donepezil and a manufacturing method thereof and, more specifically, an oral dissolving film formulation for treating dementia including donepezil or acid addition salt thereof, cyclodextrin or derivatives thereof, alginic acid or salts thereof and a substrate for forming films, which is manufactured by adding a substrate for forming films to a liquid solution manufactured by firstly adding donepezil or acid addition salt thereof and secondly adding alginic acid or salts thereof to a solution in which cyclodextrin or derivatives thereof is melted, covering bitter taste and paralysis of donepezil.
    Type: Application
    Filed: August 1, 2014
    Publication date: June 30, 2016
    Inventors: Hyun Soo KIM, Won Young JANG, Jin Hee UM, Sang Pil SIM, Kyu Jeong YEON, Jin Gyu PARK
  • Patent number: 9379106
    Abstract: A semiconductor device includes a substrate including first to third fins aligned in a first direction, a first trench arranged between the first fin and the second fin, and a second trench arranged between the second fin and the third fin. The semiconductor device further includes a first field insulating film arranged in the first trench, a second field insulating film formed in the second trench, a first dummy gate arranged on the first field insulating film, and a second dummy gate at least partly arranged on the second field insulating film. A lower surface of the second field insulating film is arranged to be lower than a lower surface of the first field insulating film.
    Type: Grant
    Filed: October 2, 2014
    Date of Patent: June 28, 2016
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Soo-Hun Hong, Hee-Soo Kang, Hyun-Jo Kim, Sang-Pil Sim, Hee-Don Jung
  • Publication number: 20150357329
    Abstract: A semiconductor device including source drain stressors is provided. The semiconductor device includes a gate structure including a gate insulating layer and a gate electrode on a semiconductor substrate. Gate spacers may be disposed on sidewalls of the gate structure and a stressor pattern including an impurity region is disposed on a side of the gate structure. The stressor pattern includes a protruded portion having a top surface higher than a bottom surface of the gate structure and a facet in the protruded portion. The facet is slanted at a predetermined angle with respect to an upper surface of the semiconductor substrate and forms a concave portion with one of the gate spacers. A blocking insulating layer may extend conformally on the stressor pattern and the gate spacers and an insulating wing pattern is disposed in the concave portion on the blocking insulating layer.
    Type: Application
    Filed: August 17, 2015
    Publication date: December 10, 2015
    Inventors: Se-Chan Lim, Sang-Pil Sim, Dong-Kyun Sohn, Su-Youn Yi
  • Patent number: 9141751
    Abstract: A method of forming a pattern includes defining a plurality of patterns, defining a plurality of pitch violating patterns that contact the plurality of patterns and correspond to regions between the patterns, classifying the plurality of pitch violating patterns into a first region and a second region that is adjacent to the first region, selecting one of the first region and the second region, and forming an initial pattern defined as the selected first or second region. The selecting includes performing at least one of i) selecting a region that contact dummy patterns, ii) selecting a region of a same kind as one region, and iii) selecting a region that contacts a concave part of an enclosure from the first region and the second region.
    Type: Grant
    Filed: July 25, 2013
    Date of Patent: September 22, 2015
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Hyun-Jong Lee, Soo-Han Choi, Jung-Ho Do, Chul-Hong Park, Sang-Pil Sim
  • Publication number: 20150054089
    Abstract: A semiconductor device includes a substrate including first to third fins aligned in a first direction, a first trench arranged between the first fin and the second fin, and a second trench arranged between the second fin and the third fin. The semiconductor device further includes a first field insulating film arranged in the first trench, a second field insulating film formed in the second trench, a first dummy gate arranged on the first field insulating film, and a second dummy gate at least partly arranged on the second field insulating film. A lower surface of the second field insulating film is arranged to be lower than a lower surface of the first field insulating film.
    Type: Application
    Filed: October 2, 2014
    Publication date: February 26, 2015
    Inventors: SOO-HUN HONG, HEE-SOO KANG, HYUN-JO KIM, SANG-PIL SIM, HEE-DON JUNG
  • Publication number: 20140353769
    Abstract: A semiconductor device can include a field insulation layer including a planar major surface extending in first and second orthogonal directions and a protruding portion that protrudes a particular distance from the major surface relative to the first and second orthogonal directions. First and second multi-channel active fins can extend on the field insulation layer, and can be separated from one another by the protruding portion. A conductive layer can extend from an uppermost surface of the protruding portion to cross over the protruding portion between the first and second multi-channel active fins.
    Type: Application
    Filed: August 19, 2014
    Publication date: December 4, 2014
    Inventors: Shigenobu Maeda, Hee-Soo Kang, Sang-Pil Sim, Soo-Hun Hong
  • Publication number: 20140346602
    Abstract: A semiconductor device can include a field insulation layer including a planar major surface extending in first and second orthogonal directions and a protruding portion that protrudes a particular distance from the major surface relative to the first and second orthogonal directions. First and second multi-channel active fins can extend on the field insulation layer, and can be separated from one another by the protruding portion. A conductive layer can extend from an uppermost surface of the protruding portion to cross over the protruding portion between the first and second multi-channel active fins.
    Type: Application
    Filed: August 13, 2014
    Publication date: November 27, 2014
    Inventors: Shigenobu Maeda, Hee-Soo Kang, Sang-Pil Sim, Soo-Hun Hong