Abstract: An obstacle detecting unit includes a reflective mirror formed to reflect light which is incident from a front area and a lower portion of the front area below a central portion of the reflective mirror; a catadioptric lens disposed coaxially with the reflective mirror in an upper portion of the reflective mirror, the catadioptric lens on which light incident from the front area and an upper portion of the front area; and an image forming module disposed coaxially with the reflective mirror below the reflective mirror, the image forming module on which the light reflected by the reflective mirror is incident, wherein a through hole is formed in the central portion of the reflective mirror, and the light coming out of the catadioptric lens passes through the through hole and then is incident on the image forming module.

Abstract: The present invention relates to an optically transparent composite film for a display, comprising: a polymer substrate containing a transparent thermoplastic base resin; a plasma surface treatment layer formed on one surface of the polymer substrate and surface-modified through plasma treatment; an inorganic gas barrier layer formed on the upper surface of the plasma surface treatment layer; an organic-inorganic hybrid overcoating layer formed on the upper surface of the inorganic gas barrier layer and including a curable product of a curable sol solution; and an inorganic rear layer formed on the other surface of the polymer substrate.

Abstract: An obstacle detecting unit includes a reflective mirror formed to reflect light which is incident from a front area and a lower portion of the front area below a central portion of the reflective mirror; a catadioptric lens disposed coaxially with the reflective mirror in an upper portion of the reflective mirror, the catadioptric lens on which light incident from the front area and an upper portion of the front area; and an image forming module disposed coaxially with the reflective mirror below the reflective mirror, the image forming module on which the light reflected by the reflective mirror is incident, wherein a through hole is formed in the central portion of the reflective mirror, and the light coming out of the catadioptric lens passes through the through hole and then is incident on the image forming module.

Abstract: A method for processing traffic using a multi-network interface card and a network device employing the method are provided. The network device includes a first network card configured to classify and filter traffic, a second network card configured to inspect and process the traffic classified by the first network card, a processor configured to manage the first and second network cards and apply network policies to the first and second network cards, respectively, and a memory configured to store the network policies.

Abstract: Provided are a packet processing apparatus and method for detecting a duplicate acknowledgement (ACK) packet. The packet processing apparatus initiates a session and then detects a retransmission packet and a duplicate ACK packet from input/output packets using statistic information related to packet retransmission. Accordingly, unnecessary traffic generated regardless of a user's intension can be blocked.

Abstract: Semiconductor memory device with high-speed data transmission capability, system having the same includes a plurality of address input circuits and a plurality of data output circuits and a training driver configured to distribute address information input through the plurality of address input circuits together with a data loading signal for a read training, and generate data training patterns to be output through the plurality of data output circuits.

Abstract: An apparatus for analyzing traffic is provided. The apparatus may precisely identify and analyze web traffic through 5 tuple-, HTTP-, and request/response pair-based packet analysis by monitoring the correlation between sessions.

Abstract: A semiconductor memory device includes: a data multiplexing unit configured to output one of a data training pattern and data transferred through a first global input/output line in response to a training control signal; and a latch unit configured to latch an output of the data multiplexing unit to apply and maintain the latched output to a second global input/output line.

Abstract: Provided are a packet processing apparatus and method for detecting a duplicate acknowledgement (ACK) packet. The packet processing apparatus initiates a session and then detects a retransmission packet and a duplicate ACK packet from input/output packets using statistic information related to packet retransmission. Accordingly, unnecessary traffic generated regardless of a user's intension can be blocked.

Abstract: A method for processing traffic using a multi-network interface card and a network device employing the method are provided. The network device includes a first network card configured to classify and filter traffic, a second network card configured to inspect and process the traffic classified by the first network card, a processor configured to manage the first and second network cards and apply network policies to the first and second network cards, respectively, and a memory configured to store the network policies.

Abstract: Semiconductor memory device with high-speed data transmission capability, system having the same includes a plurality of address input circuits and a plurality of data output circuits and a training driver configured to distribute address information input through the plurality of address input circuits together with a data loading signal for a read training, and generate data training patterns to be output through the plurality of data output circuits.

Abstract: Semiconductor memory device with high-speed data transmission capability, system having the same includes a plurality of address input circuits and a plurality of data output circuits and a training driver configured to distribute address information input through the plurality of address input circuits together with a data loading signal for a read training, and generate data training patterns to be output through the plurality of data output circuits.

Abstract: A semiconductor memory device includes: a data multiplexing unit configured to output one of a data training pattern and data transferred through a first global input/output line in response to a training control signal; and a latch unit configured to latch an output of the data multiplexing unit to apply and maintain the latched output to a second global input/output line.

Abstract: A packet processing apparatus and method are provided. According to the packet processing apparatus and method, it is possible to manufacture a product within a short period of time in a case in which there are signals that are not provided by an existing network processing unit (NPU) through a bridging algorithm that is realized in a field programmable gate array (FPGA).

Abstract: An apparatus for analyzing traffic is provided. The apparatus may precisely identify and analyze web traffic through 5 tuple-, HTTP-, and request/response pair-based packet analysis by monitoring the correlation between sessions.

Abstract: A semiconductor memory device includes: a data multiplexing unit configured to output one of a data training pattern and data transferred through a first global input/output line in response to a training control signal; and a latch unit configured to latch an output of the data multiplexing unit to apply and maintain the latched output to a second global input/output line.

Abstract: A semiconductor memory device includes a mode register set for establishing information on a delay time, a delay time calculator for calculating an I/O path delay time of a data clock on a basis of a unit period of a system clock, and a delay locked clock generator for reflecting in the data clock a value of subtracting an output of the delay time calculator from the information established in the mode register set.

Abstract: Semiconductor memory device and method for operating the same includes a phase detection unit configured to compare a phase of a first reference clock and a phase of a second divided reference clock to output a comparison result signal and a phase control and division unit configured to generate the second divided reference clock by dividing a second reference clock by a predetermined ratio according to the comparison result signal outputted from the phase detection unit and adjusting a phase of the second reference clock.

Abstract: Disclosed herein is a method of controlling power consumption of a mobile communication terminal, and a mobile communication terminal in which the method is implemented. The mobile communication terminal, having peripheral devices, such as a speaker, Liquid Crystal Display (LCD) and a camera, and a diversity unit for implementing a diversity function, includes a power measurement unit and a control unit. The power measurement unit measures power consumed in the diversity unit. The control unit controls the power consumption of the peripheral devices based on the amount of consumed power read from the power measurement unit. Accordingly, the power consumption of the peripheral devices is appropriately controlled, so that unnecessary power consumption can be reduced, therefore the lifespan of a battery can be prolonged.

Abstract: Semiconductor memory device and method for operating the same includes a phase detection unit configured to compare a phase of a first reference clock and a phase of a second divided reference clock to output a comparison result signal and a phase control and division unit configured to generate the second divided reference clock by dividing a second reference clock by a predetermined ratio according to the comparison result signal outputted from the phase detection unit and adjusting a phase of the second reference clock.