Patents by Inventor Sangwon BAEK

Sangwon BAEK has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11961806
    Abstract: A semiconductor device may include a substrate including a first region and a second region and a first active pattern on the first region. The first active pattern may include a pair of first source/drain patterns and a first channel pattern therebetween, and the first channel pattern may include a plurality of first semiconductor patterns stacked on the substrate. The semiconductor device may further include a first gate electrode, which is provided on the first channel patterns, and a supporting pattern, which is provided on side surfaces of the plurality of first semiconductor patterns to connect the side surfaces of the plurality of first semiconductor patterns to each other.
    Type: Grant
    Filed: June 21, 2021
    Date of Patent: April 16, 2024
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Noh Yeong Park, Beomjin Park, Dong Il Bae, Sangwon Baek, Hyun-Seung Song
  • Patent number: 11955556
    Abstract: A semiconductor device includes channels, a gate structure, and a source/drain layer. The channels are stacked in a vertical direction. Each channel extends in a first direction. The gate structure extends in a second direction. The gate structure covers the channels. The source/drain layer is connected to each of opposite sidewalls in the first direction of the channels on the substrate, and includes a doped semiconductor material. The source/drain layer includes first and second epitaxial layers having first and second impurity concentrations, respectively. The first epitaxial layer covers a lower surface and opposite sidewalls in the first direction of the second epitaxial layer. A portion of each of opposite sidewalls in the first direction of the gate structure protrudes in the first direction from opposite sidewalls in the first direction of the channels to partially penetrate through the first epitaxial layer but not to contact the second epitaxial layer.
    Type: Grant
    Filed: June 9, 2022
    Date of Patent: April 9, 2024
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Woocheol Shin, Sunggi Hur, Sangwon Baek, Junghan Lee
  • Publication number: 20240079466
    Abstract: A semiconductor device includes a substrate including an active pattern, a channel pattern on the active pattern, the channel pattern including a plurality of semiconductor patterns spaced apart from each other, a source/drain pattern connected to the plurality of semiconductor patterns, a gate electrode including, an inner electrode between a first semiconductor pattern of the plurality of semiconductor patterns and a second semiconductor pattern of the plurality of semiconductor patterns, the first semiconductor pattern and the second semiconductor pattern being adjacent to each other, and an outer electrode on an uppermost semiconductor pattern of the plurality of semiconductor patterns.
    Type: Application
    Filed: April 20, 2023
    Publication date: March 7, 2024
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Sangwon Baek, Beomjin Park, Myung Gil Kang, Dongwon Kim, Hyumin Yoo, Namkyu Cho
  • Publication number: 20240006522
    Abstract: A semiconductor device includes an active region extending in a first direction on a substrate; a plurality of channel layers on the active region and spaced apart from each other in a vertical direction that is perpendicular to the first direction; a gate structure on the substrate, the gate structure intersecting the active region and the plurality of channel layers, extending in a second direction crossing the first direction, and respectively surrounding the plurality of channel layers; inner spacer layers on both sides of the gate structure in the first direction, and on respective lower surfaces of the plurality of channel layers; a protective layer in contact with the inner spacer layers, the plurality of channel layers, and the active region; and a source/drain region on the active region, on at least one side of the gate structure, and in contact with the inner spacer layers.
    Type: Application
    Filed: June 1, 2023
    Publication date: January 4, 2024
    Inventors: Junbeom PARK, Sangwon BAEK, Yunsuk NAM
  • Publication number: 20220302316
    Abstract: A semiconductor device includes channels, a gate structure, and a source/drain layer. The channels are stacked in a vertical direction. Each channel extends in a first direction. The gate structure extends in a second direction. The gate structure covers the channels. The source/drain layer is connected to each of opposite sidewalls in the first direction of the channels on the substrate, and includes a doped semiconductor material. The source/drain layer includes first and second epitaxial layers having first and second impurity concentrations, respectively. The first epitaxial layer covers a lower surface and opposite sidewalls in the first direction of the second epitaxial layer. A portion of each of opposite sidewalls in the first direction of the gate structure protrudes in the first direction from opposite sidewalls in the first direction of the channels to partially penetrate through the first epitaxial layer but not to contact the second epitaxial layer.
    Type: Application
    Filed: June 9, 2022
    Publication date: September 22, 2022
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Woocheol SHIN, Sunggi HUR, Sangwon BAEK, Junghan LEE
  • Patent number: 11387367
    Abstract: A semiconductor device includes channels, a gate structure, and a source/drain layer. The channels are stacked in a vertical direction. Each channel extends in a first direction. The gate structure extends in a second direction. The gate structure covers the channels. The source/drain layer is connected to each of opposite sidewalls in the first direction of the channels on the substrate, and includes a doped semiconductor material. The source/drain layer includes first and second epitaxial layers having first and second impurity concentrations, respectively. The first epitaxial layer covers a lower surface and opposite sidewalls in the first direction of the second epitaxial layer. A portion of each of opposite sidewalls in the first direction of the gate structure protrudes in the first direction from opposite sidewalls in the first direction of the channels to partially penetrate through the first epitaxial layer but not to contact the second epitaxial layer.
    Type: Grant
    Filed: September 28, 2020
    Date of Patent: July 12, 2022
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Woocheol Shin, Sunggi Hur, Sangwon Baek, Junghan Lee
  • Publication number: 20220173053
    Abstract: A semiconductor device may include a substrate including a first region and a second region and a first active pattern on the first region. The first active pattern may include a pair of first source/drain patterns and a first channel pattern therebetween, and the first channel pattern may include a plurality of first semiconductor patterns stacked on the substrate. The semiconductor device may further include a first gate electrode, which is provided on the first channel patterns, and a supporting pattern, which is provided on side surfaces of the plurality of first semiconductor patterns to connect the side surfaces of the plurality of first semiconductor patterns to each other.
    Type: Application
    Filed: June 21, 2021
    Publication date: June 2, 2022
    Inventors: NOH YEONG PARK, BEOMJIN PARK, DONG IL BAE, Sangwon BAEK, HYUN-SEUNG SONG
  • Publication number: 20210257499
    Abstract: A semiconductor device includes channels, a gate structure, and a source/drain layer. The channels are stacked in a vertical direction. Each channel extends in a first direction. The gate structure extends in a second direction. The gate structure covers the channels. The source/drain layer is connected to each of opposite sidewalls in the first direction of the channels on the substrate, and includes a doped semiconductor material. The source/drain layer includes first and second epitaxial layers having first and second impurity concentrations, respectively. The first epitaxial layer covers a lower surface and opposite sidewalls in the first direction of the second epitaxial layer. A portion of each of opposite sidewalls in the first direction of the gate structure protrudes in the first direction from opposite sidewalls in the first direction of the channels to partially penetrate through the first epitaxial layer but not to contact the second epitaxial layer.
    Type: Application
    Filed: September 28, 2020
    Publication date: August 19, 2021
    Applicant: Samsung Electronics Co., Ltd.
    Inventors: Woocheol SHIN, Sunggi HUR, Sangwon BAEK, Junghan LEE