Abstract: A cigarette includes a tobacco rod, a front end plug positioned at a front end of the tobacco rod, a filter rod positioned at a rear end of the tobacco rod, and a wrapper surrounding the tobacco rod, the front end plug, and the filter rod and including at least one perforation formed in an area of the wrapper to allow air to flow to the inside of the wrapper.

Abstract: Provided is an aerosol-generating article including a wrapper which is discolored as the aerosol-generating material is heated, the aerosol-generating article including: a tobacco rod; a front-end plug arranged on a side of the tobacco rod; a filter rod arranged on the other side of the tobacco rod; and the wrapper surrounding the tobacco rod, the front-end plug, and the filter rod, wherein the wrapper includes a thermochromic material which is heated and discolored by an aerosol-generating device when the aerosol-generating article is inserted into the aerosol-generating device.

Abstract: The present invention relates to a system for constructing a hyperkalemia prediction algorithm through an electrocardiogram, a method for constructing the hyperkalemia prediction algorithm through the electrocardiogram by using the same, and a hyperkalemia prediction system using the electrocardiogram, and the system for constructing a hyperkalemia prediction algorithm through an electrocardiogram includes: a data collection unit collecting electrocardiogram data of multiple hyperkalemia patients; a data processing unit generating a training dataset for machine learning based on the electrocardiogram data collected by the data collection unit; and a model generation unit constructing a neural network model for predicting a hyperkalemia using an electrocardiogram based on the training dataset provided by the data processing unit.

Abstract: Disclosed herein is a method of depositing a transition metal single-atom catalyst including preparing a carbon carrier, and depositing a transition metal single-atom catalyst on the carbon carrier, in which the carbon carrier is surface-treated by an oxidation process, and wherein the deposition is carried out by an arc plasma process.

Abstract: The present disclosure relates to design of a line panel codebook and a method and an apparatus for transmission and reception based on it in a wireless communication system. A method in which a transmitter transmits a precoded signal to a receiver in a wireless communication system according to an embodiment of the present disclosure may include determining one or more codewords and a panel phase factor for each of a plurality of line panels equipped with the transmitter; precoding data which will be transmitted to the receiver based on the determined one or more codewords and a panel phase factor; and transmitting the precoded signal to the receiver.

Abstract: Provided is a method for manufacturing a binder for coating a secondary battery separator, wherein the method may include performing a first polymerization on a first monomer to form a precursor solution including a chain-type particle, and adding a second monomer to the precursor solution and performing a second polymerization to form an emulsion particle on the chain-type particle. In an embodiment, the second polymerization may include an emulsification polymerization in which the chain-type particle acts as an emulsifier.

Abstract: The present disclosure relates to design of a line panel codebook and a method and an apparatus for transmission and reception based on it in a wireless communication system. A method in which a transmitter transmits a precoded signal to a receiver in a wireless communication system according to an embodiment of the present disclosure may include determining one or more codewords and a panel phase factor for each of a plurality of line panels equipped with the transmitter; precoding data which will be transmitted to the receiver based on the determined one or more codewords and a panel phase factor; and transmitting the precoded signal to the receiver.

Abstract: In a method of operating a storage device including at least one nonvolatile memory device and a memory controller configured to control the at least one nonvolatile memory device, a boundary page of a first memory block among a plurality of memory blocks included in the at least one nonvolatile memory device is searched for, at least one clean page, in which data is not written, of the first memory block is searched for, a dummy program operation is performed on a portion of the boundary page and the at least one clean page, and an erase operation is performed on the first memory block.

Abstract: In a method of operating a storage device including at least one nonvolatile memory device and a memory controller configured to control the at least one nonvolatile memory device, a boundary page of a first memory block among a plurality of memory blocks included in the at least one nonvolatile memory device is searched for, at least one clean page, in which data is not written, of the first memory block is searched for, a dummy program operation is performed on a portion of the boundary page and the at least one clean page, and an erase operation is performed on the first memory block.

Abstract: To program in a nonvolatile memory device include a plurality of memory cells that are programmed into multiple states through at least two program steps, a primary program is performed from an erase level to a first target level with respect to the memory cells coupled to a selected word line A preprogram is performed from the erase level to a preprogram level in association with the primary program with respect to the memory cells coupled to the selected word line, where the preprogram level is larger than the erase level and smaller than the first target level A secondary program is performed from the preprogram level to a second target level with respect to the preprogrammed memory cells coupled to the selected word line.

Abstract: To program in a nonvolatile memory device include a plurality of memory cells that are programmed into multiple states through at least two program steps, a primary program is performed from an erase level to a first target level with respect to the memory cells coupled to a selected word line A preprogram is performed from the erase level to a preprogram level in association with the primary program with respect to the memory cells coupled to the selected word line, where the preprogram level is larger than the erase level and smaller than the first target level A secondary program is performed from the preprogram level to a second target level with respect to the preprogrammed memory cells coupled to the selected word line.

Abstract: A nonvolatile memory device comprises a first mat, a second mat, a third mat, a first address decoder, a second address decoder, and a third address decoder. The first mat comprises first memory blocks, the second mat comprises second memory blocks, and the third mat comprises third memory blocks. The first address decoder selects one of the first memory blocks according to a first even address, the second address decoder selects one of the second memory blocks according to a second even address or a first odd address, and the third address decoder selects one of the third memory blocks according to a second odd address.

Abstract: A nonvolatile memory device comprises a first mat, a second mat, a third mat, a first address decoder, a second address decoder, and a third address decoder. The first mat comprises first memory blocks, the second mat comprises second memory blocks, and the third mat comprises third memory blocks. The first address decoder selects one of the first memory blocks according to a first even address, the second address decoder selects one of the second memory blocks according to a second even address or a first odd address, and the third address decoder selects one of the third memory blocks according to a second odd address.

Abstract: A method of programming memory cells for a non-volatile memory device is provided. The method includes performing an incremental step pulse program (ISPP) operation based on a program voltage, a first verification voltage, and a second verification voltage, and changing an increment value of the program voltage based on a first pass-fail result of the memory cells, the first pass-fail result being generated based on the first verification voltage. The ISPP operation is finished based on a second pass-fail result of the memory cells, the second pass-fail result being generated based on the second verification voltage.

Abstract: A nonvolatile memory device comprises a first mat, a second mat, a third mat, a first address decoder, a second address decoder, and a third address decoder. The first mat comprises first memory blocks, the second mat comprises second memory blocks, and the third mat comprises third memory blocks. The first address decoder selects one of the first memory blocks according to a first even address, the second address decoder selects one of the second memory blocks according to a second even address or a first odd address, and the third address decoder selects one of the third memory blocks according to a second odd address.

Abstract: In one embodiment, the non-volatile memory device includes a well of a first conductivity type formed in a substrate, and a first plurality of memory cell transistors connected in series to a bit line formed in the well. A buffer is formed in the substrate outside the well and is connected to the bit line. At least one de-coupling transistor is configured to de-couple the buffer from the bit line, and the de-coupling transistor is formed in the well.

Abstract: In a method of reading data from a non-volatile memory device, read data is generated based on a word line voltage. The read data includes data read from a plurality of sectors included in the non-volatile memory device. Bad sector data is transferred data based on read data and bad sector information. The bad sector data corresponds to data read from at least one bad sector included in the plurality of sectors. The bad sector information is updated by checking error bits of the bad sector data. The word line voltage is generated based on the updated bad sector information.

Abstract: A nonvolatile memory device includes a plurality of memory cells connected to a wordline and arranged in a row direction, bitlines connected to the plurality of memory cells, respectively, and a bitline bias circuit configured to separately control bias voltages provided to the bitlines according to positions of the memory cells along the row direction.

Abstract: In one embodiment, the non-volatile memory device includes a well of a first conductivity type formed in a substrate, and a first plurality of memory cell transistors connected in series to a bit line formed in the well. A buffer is formed in the substrate outside the well and is connected to the bit line. At least one de-coupling transistor is configured to de-couple the buffer from the bit line, and the de-coupling transistor is formed in the well.

Abstract: In one embodiment, the non-volatile memory device includes a well of a first conductivity type formed in a substrate, and a first plurality of memory cell transistors connected in series to a bit line formed in the well. A buffer is formed in the substrate outside the well and is connected to the bit line. At least one de-coupling transistor is configured to de-couple the buffer from the bit line; and the de-coupling transistor is formed in the well.