Patents by Inventor Sanjay Gupta

Sanjay Gupta has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20090228312
    Abstract: A method for the creation of timesheets, workload management and analysis includes: receiving a set of individual activity entries in the form of task assignments and workload claim codes into a resource and activity planning tool; exporting individual activity entries from the set of individual activity entries to one or more individual user files; populating one or more individual user calendars with entries from the one or more corresponding individual user files; converting the one or more calendar entries into data format files; generating timesheet and workload data from the data format files; uploading the timesheet and workload data into a workload and data warehouse; and providing the timesheet and workload data for analysis.
    Type: Application
    Filed: March 5, 2008
    Publication date: September 10, 2009
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: John P. Cazares, Nancy Greco, Charles B. Grizzaffi, Sanjay Gupta, Aditi Jaggi, Victor P. Lesmana, Jana Palmer, Arvin T. Poole, Bharat P. Shah
  • Patent number: 7523144
    Abstract: A method, system and computer program product for controlling access to data files stored in a repository is disclosed. The invention entails a determination of the requested file's availability and the authorization and authentication of the requester. A requester may specify the format in which they wish to receive the data file, and facilities are provided for translating the requested file to the requested format if the file is not stored in the requested format. Advantageously, the invention provides a repository for retaining responses to requests so as to minimize successive requests against the repository for the same data file. Moreover, in such instances wherein a requested data file requires a format translation, a facility is provided for determining the correct stored file format to use as the input for the format translation. Such a determination may be based upon criteria such as minimizing data lost as a result of the translation or minimizing processing required in performing the translation.
    Type: Grant
    Filed: December 5, 2000
    Date of Patent: April 21, 2009
    Assignee: International Business Machines Corporation
    Inventors: Ghassan Chidiac, Sanjay Gupta, Jeff Nordyke, Giancarlo Palleschi, Matthew Rosenthal, Arnold O. Vimba
  • Publication number: 20090094194
    Abstract: A method and system is provided that optimizes performance in non-relational databases. According to one aspect, view index size is kept at a level that optimizes performance by categorizing and sorting only a subset of the columns contained within the corresponding view. The remaining columns are marked as having been categorized and sorted, but are not actually categorized and sorted until these columns are queried.
    Type: Application
    Filed: September 9, 2008
    Publication date: April 9, 2009
    Inventor: Sanjay GUPTA
  • Patent number: 7516115
    Abstract: A method and system is provided that optimizes performance in non-relational databases. A method includes: sorting and categorizing a first set of columns within a view of the non-relational database; marking a second set of columns within the view as if the second set of columns were already sorted and categorized prior to actual sorting and categorizing of the second set of columns, the second set of columns including all columns exclusive of the first set of columns; sorting and categorizing at least one column of the second set of columns in response to performing a query on the at least one column; maintaining the first set of columns in a portion of cache; and maintaining the at least one column of the second set of columns in another portion of cache. In the method, the second set of columns is visible as collapsed data.
    Type: Grant
    Filed: August 20, 2003
    Date of Patent: April 7, 2009
    Assignee: International Business Machines Corporation
    Inventor: Sanjay Gupta
  • Patent number: 7509319
    Abstract: A method, system and computer program product for controlling access to data files stored in a repository is disclosed. The method includes receiving a request for a data file from a requester. The request specifies a data format preference for receiving the data file. The requested data format is different than either of a data format used to create the data file and a data format in which the data file is stored at the time of the request. The method also includes determining if the requester is authorized to access the requested data file and translating the requested data file from a stored data format into the requested data format responsive to receiving the request if the stored format differs from the requested format. The method further includes making the translated data file accessible to the requester if it is determined that the requester is authorized.
    Type: Grant
    Filed: May 13, 2005
    Date of Patent: March 24, 2009
    Assignee: International Business Machines Corporation
    Inventors: Kim Betros, Ghassan Chidiac, Sanjay Gupta, Jeff Nordyke, Giancarlo Palleschi, Matthew Rosenthal, Evan E. Roubiecek, Arnold O. Vimba, Michael P. Zarnick
  • Patent number: 7472034
    Abstract: A system and method for test generation for system level verification using parallel algorithms are provided. The present invention generates test patterns for system level tests by exploiting the scalability of parallel algorithms while allowing for data set coloring and expected result checking. Based on the characteristics of the system being tested an iterative parallel algorithm is selected from a plurality of possible parallel algorithms. The selected parallel algorithm is then separated into separate program statements for execution by a plurality of processors. A serial version of the selected algorithm is executed to generate a set of expected results. The devised parallel version of the selected algorithm is then run to generate a set of test result data which is compared to the set of expected results. If the two sets of data match, it is determined that the system is operating correctly.
    Type: Grant
    Filed: June 5, 2007
    Date of Patent: December 30, 2008
    Assignee: International Business Machines Corporation
    Inventors: Sanjay Gupta, Steven L. Roberts, Christopher J. Spandikow
  • Publication number: 20080313583
    Abstract: An apparatus and method are provided in which a previously verified SoC is coupled to a SoC under test via a communication bus or other type of communication interface. The previously verified SoC is provided with the same test stimuli as the SoC under test and thus, generates expected test results data. The test stimuli are sent to the SoC under test via a peripheral communication interface between the previously verified SoC and the SOC under test. The SoC under test generates actual test result data that is output to the previously verified SoC. The previously verified SoC may then compare the expected test results data with the actual test result data generated by the SoC under test to determine if they match. If the two sets of data do not match, then a mismatch notification may be generated and output.
    Type: Application
    Filed: August 21, 2008
    Publication date: December 18, 2008
    Applicant: International Business Machines Corporation
    Inventors: Kenneth O. Brinson, Sanjay Gupta, Binh T. Hoang, James M. Stafford
  • Publication number: 20080288230
    Abstract: A design structure is embodied in a machine readable medium for designing, manufacturing, or testing integrated circuitry. The design structure includes a general purpose computational resource for performing general purpose operations of a system. A special purpose computational resource is coupled to the general purpose computational resource. The special purpose computational resource is for: storing test patterns, a description of the integrated circuitry, and a description of hardware for testing the integrated circuitry; and executing software for simulating an operation of the described hardware's testing of the described integrated circuitry in response to the test patterns.
    Type: Application
    Filed: May 30, 2008
    Publication date: November 20, 2008
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Matthew E. Fernsler, Tilman Gloekler, Sanjay Gupta, Christopher J. Spandikow, Todd Swanson
  • Publication number: 20080268896
    Abstract: A data storage device tracing system includes at least one container configured to maintain at least one electronic data storage device, a two-way radio coupled to each of the container(s), and a network including a network coordinator configured to transmit to and receive data from the two-way radio. In this regard, the two-way radio communicates real-time container location data to the network coordinator to enable real-time tracing of the container(s) and the electronic data storage device(s).
    Type: Application
    Filed: April 24, 2007
    Publication date: October 30, 2008
    Inventors: Denis J. Langlois, Purushotham G. Lala Balaji, Sanjay Gupta
  • Patent number: 7434182
    Abstract: A method is provided in which a previously verified SoC is coupled to a SoC under test via a communication bus or other type of communication interface. The previously verified SoC is provided with the same test stimuli as the SoC under test and thus, generates expected test results data. The test stimuli are sent to the SoC under test via a peripheral communication interface between the previously verified SoC and the SoC under test. The SoC under test generates actual test result data that is output to the previously verified SoC. The previously verified SoC may then compare the expected test results data with the actual test result data generated by the SoC under test to determine if they match. If the two sets of data do not match, then a mismatch notification may be generated and output.
    Type: Grant
    Filed: July 14, 2005
    Date of Patent: October 7, 2008
    Assignee: International Business Machines Corporation
    Inventors: Kenneth O. Brinson, Sanjay Gupta, Binh T. Hoang, James M. Stafford
  • Patent number: 7400172
    Abstract: A buffer includes a source follower module and a pull-up/pull-down module that is connected to the source follower module. An output signal at the output terminal of the source follower module follows an input signal at the input terminal with a predetermined delay, independent of the Miller capacitance. The pull-up/pull-down module pulls the output of source follower to supply/ground rail.
    Type: Grant
    Filed: September 6, 2007
    Date of Patent: July 15, 2008
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Sanjay Gupta, Qadeer A. Khan
  • Publication number: 20080167853
    Abstract: A general purpose computational resource is provided for performing general purpose operations of a system. A special purpose computational resource is coupled to the general purpose computational resource.
    Type: Application
    Filed: January 9, 2007
    Publication date: July 10, 2008
    Inventors: Matthew E. Fernsler, Tilman Gloekler, Sanjay Gupta, Christopher J. Spandikow, Todd Swanson
  • Publication number: 20080167854
    Abstract: A system and method for incorporating design behavior and external stimulus in microdevice model feedback using a shared memory is presented. The invention describe herein uses the attached memory model to provide additional heuristics to an application executing on an emulation system's device model, which results in a more detail and real-life device emulation. The attached memory model provides a storage area for a runtime software environment to store emulation data, which is subsequently provided to the device model during emulation. The emulation data may include 1) randomization stimuli to the device model, 2) additional runtime data for checking heuristics, and 3) emulation data points that are otherwise not accessible to the device model.
    Type: Application
    Filed: January 9, 2007
    Publication date: July 10, 2008
    Inventors: Sanjay Gupta, Joseph Anthony Perrie, Steven Leonard Roberts, Todd Swanson
  • Publication number: 20080122623
    Abstract: An electronic data storage device tracing system includes at least one data storage device and a reader system. The data storage device includes a housing having an optical label and a device RFID tag coupled to the housing. In this regard, the optical label is printed with a VOLSER number and the device RFID tag includes a chip that electronically stores the VOLSER number. The reader system is configured to read the VOLSER number from the chip and trace the at least one data storage device entering/exiting the reader system.
    Type: Application
    Filed: March 23, 2007
    Publication date: May 29, 2008
    Inventors: Curtis B. Hause, Stephen J. Rothermel, Jody L. Gregg, G. Phillip Rambosek, Yung Yip, Robert C. Martin, Christopher Caprio, Karen E. Conroy, Sanjay Gupta, Kevin G. Battles, Denis J. Langlois
  • Publication number: 20080088340
    Abstract: A buffer includes a source follower module and a pull-up/pull-down module that is connected to the source follower module. An output signal at the output terminal of the source follower module follows an input signal at the input terminal with a predetermined delay, independent of the Miller capacitance. The pull-up/pull-down module pulls the output of source follower to supply/ground rail.
    Type: Application
    Filed: September 6, 2007
    Publication date: April 17, 2008
    Applicant: FREESCALE SEMICONDUCTOR, INC.
    Inventors: Sanjay GUPTA, Qadeer A. Khan
  • Publication number: 20080065676
    Abstract: An electronic data storage device tracing system includes at least one data storage device and a reader system. The data storage device includes a housing having an optical label and a device RFID tag coupled to the housing. In this regard, the optical label is printed with a volser number and the device RFID tag includes a chip that electronically stores the volser number. The reader system is configured to read the volser number from the chip and trace the at least one data storage device entering/exiting the reader system.
    Type: Application
    Filed: September 13, 2006
    Publication date: March 13, 2008
    Inventors: Curtis B. Hause, Stephen J. Rothermel, Jody L. Gregg, G. Phillip Rambosek, Yung Yip, Kevin G. Battles, Sanjay Gupta, Robert C. Martin, Christopher Caprio, Karen E. Conroy
  • Patent number: 7289990
    Abstract: A method for increasing performance of non-relational databases with reduction in view index sizes is provided. One or more user views are provided in addition to the master view having all hierarchical/categorized data. User views are created having a subset of this hierarchical/categorized data that significantly reduces index size and improves performance. The indexes of the user view are associated with the indexes of the master view. This method improves view caching by dividing view cache into partitions based on the types of view, each with different priorities and management techniques. The master view may have a higher priority and may be used by servers while the user view may have lower priorities and may be used by users and client applications. In this way, legacy non-relational databases may continue to be suitably maintained with acceptable performance and avoiding potential cost and risk of migrating to a relational database.
    Type: Grant
    Filed: June 26, 2003
    Date of Patent: October 30, 2007
    Assignee: International Business Machines Corporation
    Inventor: Sanjay Gupta
  • Publication number: 20070239772
    Abstract: A method for increasing performance of non-relational databases with reduction in view index sizes is provided. One or more user views are provided in addition to the master view having all hierarchical/categorized data. User views are created having a subset of this hierarchical/categorized data that significantly reduces index size and improves performance. The indexes of the user view are associated with the indexes of the master view. This method improves view caching by dividing view cache into partitions based on the types of view, each with different priorities and management techniques. The master view may have a higher priority and may be used by servers while the user view may have lower priorities and may be used by users and client applications. In this way, legacy non-relational databases may continue to be suitably maintained with acceptable performance and avoiding potential cost and risk of migrating to a relational database.
    Type: Application
    Filed: June 14, 2007
    Publication date: October 11, 2007
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventor: Sanjay GUPTA
  • Publication number: 20070233765
    Abstract: A system and method for test generation for system level verification using parallel algorithms are provided. The present invention generates test patterns for system level tests by exploiting the scalability of parallel algorithms while allowing for data set coloring and expected result checking. Based on the characteristics of the system being tested an iterative parallel algorithm is selected from a plurality of possible parallel algorithms. The selected parallel algorithm is then separated into separate program statements for execution by a plurality of processors. A serial version of the selected algorithm is executed to generate a set of expected results. The devised parallel version of the selected algorithm is then run to generate a set of test result data which is compared to the set of expected results. If the two sets of data match, it is determined that the system is operating correctly.
    Type: Application
    Filed: June 5, 2007
    Publication date: October 4, 2007
    Inventors: Sanjay Gupta, Steven Roberts, Christopher Spandikow
  • Patent number: 7260495
    Abstract: A system and method for test generation for system level verification using parallel algorithms are provided. The present invention generates test patterns for system level tests by exploiting the scalability of parallel algorithms while allowing for data set coloring and expected result checking. Based on the characteristics of the system being tested an iterative parallel algorithm is selected from a plurality of possible parallel algorithms. The selected parallel algorithm is then separated into separate program statements for execution by a plurality of processors. A serial version of the selected algorithm is executed to generate a set of expected results. The devised parallel version of the selected algorithm is then run to generate a set of test result data which is compared to the set of expected results. If the two sets of data match, it is determined that the system is operating correctly.
    Type: Grant
    Filed: June 6, 2005
    Date of Patent: August 21, 2007
    Assignee: International Business Machines Corporation
    Inventors: Sanjay Gupta, Steven L. Roberts, Christopher J. Spandikow