Abstract: Methods and apparatus for transmitting and receiving data using framing circuitry designed to generate data frames of a first duration at a first data rate. According to the invention, data frames are generated and decomposed at lower data rates than the rate for which the framing circuitry was originally designed, i.e., the first data rate. The framing circuitry is programmed to organize a data stream into a sequence of data frames of the first duration or to decompose such data frames into a data stream. According to the invention, such a sequence of data frames corresponds to a selected one of a plurality of equivalent data rates. Each of the equivalent data rates are lower than the first data rate.

Abstract: An apparatus and method are provided for generating a plurality of data frames in a DSL modem configured as an HTU-C device using a single clock source. The technique of the present invention generates a data clock signal by combining a first clock signal provided by a clock source and a receiver overhead signal provided by framing circuitry for indicating the insertion of frame overhead bits into a data frame. The generated data clock signal has the characteristics such that, while the receiver overhead signal is inactive, the data clock signal is active at a frequency substantially equal to frequency of the first clock signal, and while the receiver overhead signal is active, the data clock signal is inactive. The result of this technique is that incoming data is clocked into the data frame at a data rate substantially equal to the frequency of the first clock signal only during time intervals when frame overhead bits are not being inserted into the one data frame.

Abstract: An apparatus and method are provided for generating a plurality of data frames in a DSL modem configured as an HTU-C device using a single clock source. The technique of the present invention generates a data clock signal by combining a first clock signal provided by a clock source and a receiver overhead signal provided by framing circuitry for indicating the insertion of frame overhead bits into a data frame. The generated data clock signal has the characteristics such that, while said receiver overhead signal is inactive, said data clock signal is active at a frequency substantially equal to frequency of the first clock signal, and while the receiver overhead signal is active, the data clock signal is inactive. The result of this technique is that incoming data is clocked into the data frame at a data rate substantially equal to the frequency of the first clock signal only during time intervals when frame overhead bits are not being inserted into the one data frame.