Patents by Inventor Sanjay M. Bhandari

Sanjay M. Bhandari has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8515093
    Abstract: A system includes a plurality of inputs each configured to receive a filtered version of a source signal. The system extracts the energy information from each input signal and compares the energy information of a plurality of input signals. Alternatively, the system extracts energy information from a signal that is the difference of two input signals. Based on the energy information, the system determines at least one parameter that may be changed in at least one circuit in a plurality of circuits to minimize the differences in energy of the input signals or to minimize the energy of the difference signal. Parameters may include for example amplification, delay, and corner frequency values. The set of circuits may include microphone interface circuits. Merely by way of example, a system with microphone interface circuits may be included in a hearing enhancement device or in a hands-free earpiece.
    Type: Grant
    Filed: October 7, 2010
    Date of Patent: August 20, 2013
    Assignee: National Acquisition Sub, Inc.
    Inventors: Sanjay M. Bhandari, Paul D. Smith, Jiang (Jennifer) Yu, Sheng-Yu Peng, Priscilla E. Escobar-Bowser
  • Publication number: 20110222696
    Abstract: A test signal generator provides a test signal to an acoustic device under test and a data acquisition device acquires data from the acoustic device. The initial frequency response of the signal path through the acoustic device is determined based on the test signal and the acquired data. A target frequency response is selected. A desired configuration of a configurable circuit in the signal path is determined modifying the signal path such that the frequency response of the signal path is substantially similar to the target frequency response. At least one parameter for at least one programmable component of the configurable circuit is determined and programmed into the programmable component.
    Type: Application
    Filed: March 11, 2011
    Publication date: September 15, 2011
    Inventors: Nikhil Balachandran, Sanjay M. Bhandari, Srivatsan Kandadai, Horia Giuroiu, Jeffery D. Dugger
  • Publication number: 20110085686
    Abstract: A system includes a plurality of inputs each configured to receive a filtered version of a source signal. The system extracts the energy information from each input signal and compares the energy information of a plurality of input signals. Alternatively, the system extracts energy information from a signal that is the difference of two input signals. Based on the energy information, the system determines at least one parameter that may be changed in at least one circuit in a plurality of circuits to minimize the differences in energy of the input signals or to minimize the energy of the difference signal. Parameters may include for example amplification, delay, and corner frequency values. The set of circuits may include microphone interface circuits. Merely by way of example, a system with microphone interface circuits may be included in a hearing enhancement device or in a hands-free earpiece.
    Type: Application
    Filed: October 7, 2010
    Publication date: April 14, 2011
    Inventors: Sanjay M. Bhandari, Paul D. Smith, Jiang (Jennifer) Yu, Sheng-Yu Peng, Priscilla E. Escobar-Bowser
  • Patent number: 7443977
    Abstract: A high efficiency line driver is disclosed. The line driver may be applied with equal advantage in wired and wireless communication media to amplify data signals with a minimum of power consumption. In an embodiment of the invention a line driver is disclosed which includes: at least one amplifier, a delay element, a control signal generator and a generator. The at least one amplifier includes at least one bias supply, a signal input and a signal output. The delay element accepts as an input the data signal and delays delivery of the data signal to the at least one line amplifier for amplification. The generator is responsive to a control signal to generate varying voltage levels corresponding thereto on the at least one bias supply of the at least one amplifier. The control signal generator is responsive to the input data signal to detect peaks therein and to generate the control signal corresponding thereto in advance of delivery of the data signal to the amplifier.
    Type: Grant
    Filed: November 3, 2005
    Date of Patent: October 28, 2008
    Assignee: Ikanos Communication, Inc.
    Inventors: Rouben Toumani, Robert A. Blauschild, Sanjay M. Bhandari, Behrooz Rezvani, Dale Smith
  • Patent number: 6987851
    Abstract: A high efficiency line driver is disclosed. The line driver may be applied with equal advantage in wired and wireless communication media to amplify data signals with a minimum of power consumption. In an embodiment of the invention a line driver is disclosed which includes: at least one amplifier, a delay element, a control signal generator and a generator. The at least one amplifier includes at least one bias supply, a signal input and a signal output. The delay element accepts as an input the data signal and delays delivery of the data signal to the at least one line amplifier for amplification. The generator is responsive to a control signal to generate varying voltage levels corresponding thereto on the at least one bias supply of the at least one amplifier. The control signal generator is responsive to the input data signal to detect peaks therein and to generate the control signal corresponding thereto in advance of delivery of the data signal to the amplifier.
    Type: Grant
    Filed: September 24, 2001
    Date of Patent: January 17, 2006
    Assignee: Ikanos Communication, Inc
    Inventors: Rouben Toumani, Robert A. Blauschild, Sanjay M. Bhandari, Behrooz Rezvani, Dale Smith
  • Patent number: 6924701
    Abstract: A method and apparatus for compensating an amplifier is disclosed which significantly improves the unity gain bandwidth of the amplifier. In an embodiment of the invention the amplifier includes at least one compensated pair of cascode coupled transistors including: an input transistor, a cascode transistor, and a bypass element. The input transistor exhibits a first transition frequency. The cascode transistor is cascode coupled to the input transistor. The cascode transistor exhibits a second transition frequency less than or equal to the first transition frequency of the input transistor. The bypass element couples across a corresponding current interface of the cascode transistor to substantially bypass the cascode transistor at a pole frequency thereof.
    Type: Grant
    Filed: June 3, 2003
    Date of Patent: August 2, 2005
    Assignee: Ikanos Communications, Inc.
    Inventor: Sanjay M. Bhandari
  • Patent number: 6424480
    Abstract: A magnetic storage apparatus includes first and second control devices to effectively reduce a disturbance which occurs in a read channel of the apparatus upon transition from a write mode to a read mode. The first control device is in a first gain stage coupled to a read sensor. The second control device is a back-end circuit and, in addition to reducing the duration of the write-to-read disturbance, is effective to significantly reduce offset of the apparatus. A user interface in the form of a serial interface allows user programmability of both of the first and second control devices. The serial interface and the read channel with the first and second control devices are embodied in a pre-amplifier integrated circuit. The programmability affords flexibility to the IC manufacturer as well as to the manufacturer of the magnetic storage device in optimizing the read channel to account for model-to-model and unit-to-unit variations in the write-to-read disturbance.
    Type: Grant
    Filed: September 28, 1999
    Date of Patent: July 23, 2002
    Assignee: Koninklijke Philips Electronics N.V.
    Inventors: Sanjay M. Bhandari, David Allouche, Dennis Pu
  • Patent number: 6404578
    Abstract: A preamplifier integrated circuit for a magnetic storage device includes read channel and a write channel. The read channel includes a filter in a forward signal path which has a low corner frequency (LCF) which varies in a time dependent manner related to the duration of a write-to-read disturbance induced by a transition from a write mode to a read mode. The LCF of the filter moves from a relatively high initial frequency to a lower steady state frequency to effectively reduce the settling time of the write-to-read disturbance without causing read errors which may arise from overfiltering in the steady state. Favorably, the filter in the forward signal path is formed by a unity gain differential emitter-follower in the forward path and a low pass filter (LPF) in a feedback path around the differential emitter-follower, the pole of the LPF being moved to achieved the movement of the LCF in the forward path.
    Type: Grant
    Filed: September 28, 1999
    Date of Patent: June 11, 2002
    Assignee: Koninklijke Philips Electronics N.V.
    Inventors: Sanjay M. Bhandari, David Allouche