Abstract: A dual output programmable power supply is disclosed. The dual output programmable power supply includes an AC input train including an active power factor correction circuit, a half-bridge square wave driver coupled to the AC input train through a boot strap circuit, and a pair of primary side transistors coupled to a transformer, the primary side transistors being driven by the half-bridge square wave driver. Four transistors in a bridge configuration are coupled to a transformer secondary side and to a DC input, the four transistors being driven as a bridge of active synchronous rectifiers by a full-bridge gate driver in an AC mode of operation, and the four transistors being driven as a full-bridge square wave converter by the full-bridge gate driver in a DC mode of operation. A pair of DC/DC converters is coupled to an output of the four transistors in the bridge configuration, each DC/DC converter providing a regulated output.