Patents by Inventor Sanjeev Kumar Maheshwari

Sanjeev Kumar Maheshwari has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7355489
    Abstract: An oscillator amplifier circuit is provided. The amplifier circuit can be used with a resonator to amplify and form a resonating oscillator. The amplifier circuit comprises an active circuit which includes an inverter and a current-controlled biasing circuit. One transistor of the inverter receives a voltage produced from the biasing circuit in order to place a gate terminal of that transistor at approximately a threshold voltage. The other transistor can be biased using a passive circuit element, such as a resistor. Therefore, both transistors are biased independent of each other within the optimal gain region. Large shunt capacitors are not required and the total current consumption is controlled through a variable resistor coupled to the source terminal of either the first transistor, second transistor, or possibly both transistors of the inverter to adjust the amplitude of the oscillating output.
    Type: Grant
    Filed: February 10, 2006
    Date of Patent: April 8, 2008
    Assignee: Cypress Semiconductor Corp.
    Inventor: Sanjeev Kumar Maheshwari
  • Patent number: 6768618
    Abstract: An input gate protection circuit has a pass transistor having a source coupled to an input signal. A first voltage range control circuit is coupled to a gate of the pass transistor. A second voltage range is control circuit coupled to the gate of the pass transistor.
    Type: Grant
    Filed: August 1, 2002
    Date of Patent: July 27, 2004
    Assignee: Cypress SemiConductor, Corp.
    Inventors: Sanjeev Kumar Maheshwari, Roger Jay Bettman
  • Patent number: 6687864
    Abstract: A programmable logic device comprising a macro-cell flip-flop configured to store (i) a first input when the programmable logic device is in a normal mode and (ii) a second input when the programmable logic device is in a test mode.
    Type: Grant
    Filed: June 8, 2000
    Date of Patent: February 3, 2004
    Assignee: Cypress Semiconductor Corp.
    Inventors: Anup Nayak, Ramin Ighani, Sanjeev Kumar Maheshwari
  • Patent number: 6417696
    Abstract: An apparatus comprising a first circuit and a second circuit. The first circuit may be configured to generate an output signal having a first voltage level and a first control signal in response to (i) an input signal having a second voltage level, (ii) an enable signal, and (iii) a plurality of node voltages. The second circuit may be configured to generate the plurality of node voltages in response to the first control signal. The first circuit may be configured to limit the first voltage level.
    Type: Grant
    Filed: December 1, 2000
    Date of Patent: July 9, 2002
    Assignee: Cypress Semiconductor Corp.
    Inventor: Sanjeev Kumar Maheshwari