Patents by Inventor Sanjeev R. Chitre

Sanjeev R. Chitre has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5227001
    Abstract: A system and process for removing a layer of a defined composition from a semiconductor wafer by performing at least one dry layer removal operation and at least one wet removal operation. A dry removal unit and a wet removal unit are disposed adjacent one another and robot mechanisms are provided to automatically transfer one wafer at a time through each unit in turn. The robot mechanisms are constructed to contact each wafer substantially at its edge in order to assure uniform treatment of both major surfaces of the wafer.For stripping a resist layer from a wafer, the dry stripping operation can be performed first to remove a portion of the layer, after which the remainder of the layer is removed by the wet stripping operation.
    Type: Grant
    Filed: October 19, 1990
    Date of Patent: July 13, 1993
    Assignee: Integrated Process Equipment Corporation
    Inventors: Takio Tamaki, Sanjeev R. Chitre
  • Patent number: 4687895
    Abstract: A system for heating objects serially within a plurality of separate heating zones is described. Objects are placed on pallets and sequentially moved through the plurality of heating zones. In a preferred embodiment, the pallets are fabricated of a microwave absorptive material and sequentially moved through a plurality of microwave cavities. The microwave cavities are provided with a source of microwave energy which heats the pallets, and by conduction, the objects placed thereon.
    Type: Grant
    Filed: July 30, 1984
    Date of Patent: August 18, 1987
    Assignee: Superwave Technology, Inc.
    Inventors: Sanjeev R. Chitre, Behrooz Minaee
  • Patent number: 4401840
    Abstract: A solar cell is provided which utilizes a semicrystalline semiconductor starting material. The solar cell has a metallic layer deposited over the grain boundaries between adjacent active grain areas of the material to collect the current generated in the grain areas. The metallic layer also shields the grain boundaries from illumination, thereby passivating the boundaries.
    Type: Grant
    Filed: July 22, 1981
    Date of Patent: August 30, 1983
    Assignee: Photowatt International, Inc.
    Inventor: Sanjeev R. Chitre
  • Patent number: 4314128
    Abstract: Control of thermal gradients in a crystal being pulled from a melt is achieved using stratified microwave coupling. Plural microwave radiators are arranged along the crystal path. The radiators are driven by power sources having stepped energy levels so that the radiated microwave energy heats successive regions of the crystal to progressively decreasing temperature levels. Each power source is swept in frequency, thereby controlling the depth of heating so as to achieve at each region a selected lateral temperature distribution (e.g., constant temperature across the crystal). Advantageously, the shape of each cavity conforms to the cross-sectional geometry of the crystal being pulled, which may be non-circular. This facilitates the growth of crystals having rectangular, trapezoidal or other shape. In such embodiment, the frequency sweep range, and possibly power, is separately controlled at different locations about the crystal so as to achieve the desired lateral temperature distribution.
    Type: Grant
    Filed: January 28, 1980
    Date of Patent: February 2, 1982
    Assignee: Photowatt International, Inc.
    Inventor: Sanjeev R. Chitre
  • Patent number: 4081820
    Abstract: This complementary photovoltaic cell has both an N+/P+ junction and a P+/N junction on the same epitaxial substrate, and so provides simultaneous photo-responsive outputs of both negative and positive polarity. A vertical photo-junction supplements the current output from the N+/P+ junction, and improves the efficiency of the cell. The N+/P+ junction by itself exhibits a high open circuit voltage.
    Type: Grant
    Filed: February 3, 1977
    Date of Patent: March 28, 1978
    Assignee: Sensor Technology, Inc.
    Inventor: Sanjeev R. Chitre