Patents by Inventor Sanjeev Suresh

Sanjeev Suresh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240129297
    Abstract: A cloud computing platform provides zero trust network access as a service to a customer that maintains an application on-premises. In this context, the customer may be required to demonstrate ownership of a domain before the cloud computing platform will provide access to the on-premises application via the domain.
    Type: Application
    Filed: December 28, 2022
    Publication date: April 18, 2024
    Inventors: Venkata Suresh Reddy Obulareddy, Prashil Rakeshkumar Gupta, Sanjeev Kumar Maheve
  • Publication number: 20210375392
    Abstract: The disclosed embodiments concern methods, apparatus, systems, and computer program products for developing polygenic risk score (PRS) models. In some implementations, a fully automated process is provided that allows for a PRS model to be defined by an initial set of parameters. In some implementations the PRS models are trained to provide a PRS for particular populations.
    Type: Application
    Filed: May 27, 2021
    Publication date: December 2, 2021
    Inventors: Michael Polcari, Jianan Zhan, Manoj Ganesan, Austin William Marshall, James Rowan Ashenhurst, Derrick Poo-Ray Kondo, Shiva Amiri, Subarnarekha Sinha, Sanjeev Suresh, John Michael Macpherson, Bertram Lorenz Koelsch, Cordell T. Blakkan, Shannon M. Hamilton
  • Patent number: 10931300
    Abstract: A continuous-time (CT) delta-sigma modulator (DSM) based analog to digital converter (ADC) in a radio receive chain supports a wide range of data rates in a power efficient way in a small die area. The ADC utilizes a 2nd order loop-filter with a single-amplifier loop-filter topology using a two stage Miller amplifier with a feed forward path and a push-pull output stage. High bandwidth operations utilize a “negative-R” compensation scheme at the amplifier input. Negative-R assistance is disabled for low data rate applications. With the negative-R assistance disabled, loop-filter resistor values are increased, instead of only the loop filter capacitor values to scale the noise transfer function (NTF), thereby limiting the capacitor area needed and enabling lower power operation. The NTF zero location is programmable allowing the NTF zero to be located near the intermediate frequency for different bandwidths to reduce the DSM quantization noise contribution for narrow-band (low data rate) applications.
    Type: Grant
    Filed: September 30, 2019
    Date of Patent: February 23, 2021
    Assignee: Silicon Laboratories Inc.
    Inventors: Abdulkerim L. Coban, Sanjeev Suresh