Abstract: A converter is for a differential input signal into a single-ended output signal and may include a differential pair of identical first and second transistors driven by the differential input signal, and a circuit for filtering DC components, connected between the current terminal of the second transistor not in common with the first transistor of the differential pair and an output node of the converter on which the single-ended output signal is generated. The converter generates a single-ended signal without employing a transformer, in lieu thereof the converter may include a current generator biasing the differential pair by of third and fourth output transistors, in a current mirror configuration, connected in series with the first and second transistors, respectively. The converter may also include degeneration resistors of the transistors of the current mirror, dimensioned such that the gains of the converter for each of the two input nodes of the differential signal are equal and of opposite sign.

Abstract: A silicon bipolar VCO implementing a double-coupled transformer is disclosed. The VCO circuit, which is suitable in the field of integrated RF circuits, has been integrated into a universal LNB having a down-converter block and PLL merged into a single die and implemented in silicon bipolar technology. The integrated transformer is formed by three turns of stacked metal layers, where the topmost metal layer is employed for the resonator inductance. The VCO is missing conventional biasing resistors and decoupling capacitors, thus improving phase noise and tuning range performance.

Abstract: A prescaling stage includes bistable circuit in turn including respective master and slave portions inserted between a first and a second voltage reference and feedback connected to each other. Each portion is provided with at least one differential stage supplied by the first voltage reference and connected, by a transistor stage, to the second voltage reference, as well as a differential pair of cross-coupled transistors, supplied by output terminals of the differential stage and connected, by the transistor stage, to the second voltage reference. Advantageously, each master and slave portion includes a degeneration capacitance inserted in correspondence with respective terminals of the transistors of the differential pair.