Patents by Inventor Sapna Agrawal

Sapna Agrawal has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20020166075
    Abstract: Industrial electronics and many consumer applications need lower cost, lower power consumption, control processing, and some DSP function capability. The technique described implements a system design with industrial and consumer applications in mind. The processor coprocessor architecture with freeze state method to implement power management also provides efficient software programming. Higher number of DSP computations can be programmed as hardware coprocessors functions. Recognizing the completion of DSP computation and implementing power management based on that can be a hardware function. This method of combining DSP computations and power management results in system that can find widespread use in industrial and consumer applications. The technique of using freeze state and implementing power management can also be used in non-battery applications in which power conservation is required.
    Type: Application
    Filed: May 4, 2001
    Publication date: November 7, 2002
    Inventors: Sanjay Agarwal, Sapna Agrawal
  • Publication number: 20020156994
    Abstract: A method for implementing coprocessors for control processors uses synchronous logic design method to achieve low cost and high performance in control processors. The coprocessor comprising of signed two's complement multiplication, signed divide, shift left and shift right, and normalization comprises of most of the math functions required for implementing digital signal processing algorithms. The processor coprocessor architecture uses data dependency to compute the time duration required to perform the math computation. This results in efficient implementation of DSP algorithms and eventually translates to better system level performance. The technique described to implement math computations uses a register file interface, existing instruction set, and existing legacy software development infrastructure to implement DSP systems.
    Type: Application
    Filed: April 24, 2001
    Publication date: October 24, 2002
    Inventors: Sanjay Agarwal, Sapna Agrawal