Patents by Inventor Sarabjit Mehta
Sarabjit Mehta has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11282970Abstract: An apparatus and method for a detector are disclosed. The apparatus disclosed contains a non-absorbing layer shaped as one or more pyramids, one or more collector regions, an absorber layer disposed between the one or more collector regions and the non-absorbing layer, a first electrical contact, and a second electrical contact, wherein the absorber layer is configured to absorb photons of incident light and generate minority electrical carriers and majority electrical carriers, wherein the one or more collector regions are electrically connected with the absorber layer and with the first electrical contact for extracting the minority electrical carriers, and the absorber layer is electrically connected with the one or more collector regions and with the second electrical contact to extract the majority electrical carriers.Type: GrantFiled: February 13, 2012Date of Patent: March 22, 2022Assignee: HRL Laboratories, LLCInventors: Daniel Yap, Rajesh D. Rajavel, Sarabjit Mehta
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Patent number: 11251209Abstract: An infrared photo-detector array and a method for manufacturing it are disclosed. The infrared photo-detector array contains a plurality of pyramid-shaped structures, a first light-absorbing material supporting the plurality of the pyramid-shaped structure, a carrier-selective electronic barrier supporting the first light-absorbing material, a second light-absorbing material supporting the carrier-selective electronic barrier, and a metal reflector supporting the second light-absorbing material, wherein the plurality of the pyramid shaped structures are disposed on the side of the photo-detector array facing the incident light to be detected and the metal reflector is disposed on the opposite side of the photo-detector array. The method disclosed teaches how to manufacture the infrared photo-detector array.Type: GrantFiled: March 14, 2014Date of Patent: February 15, 2022Assignee: HRL Laboratories, LLCInventors: Daniel Yap, Rajesh D. Rajavel, Sarabjit Mehta, Terence J. De Lyon, Hasan Sharifi, Pierre-Yves Delaunay
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Patent number: 10345518Abstract: A photonic waveguide for conducting light having first and second wavelengths, the waveguide comprising superposed first and second strips of light conducting semiconductor materials having first and second refractive indexes, wherein the second wavelength is shorter than the first wavelength and the second refractive index is higher than the first refractive index, wherein the width and height of the first strip of light conducting semiconductor material are such that the first strip of light conducting semiconductor material is adapted to confine an optical mode of the first wavelength and the width and height of the second strip of light conducting semiconductor material are such that the second strip of light conducting semiconductor material is adapted to confine an optical mode of the second wavelength but is too narrow to confine an optical mode of the first wavelength.Type: GrantFiled: May 31, 2017Date of Patent: July 9, 2019Assignee: HRL Laboratories, LLCInventors: Daniel Yap, Troy Rockwood, Kevin Geary, Sarabjit Mehta
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Patent number: 9726818Abstract: A photonic waveguide for conducting light having first and second wavelengths, the waveguide comprising superposed first and second strips of light conducting semiconductor materials having first and second refractive indexes, wherein the second wavelength is shorter than the first wavelength and the second refractive index is higher than the first refractive index, wherein the width and height of the first strip of light conducting semiconductor material are such that the first strip of light conducting semiconductor material is adapted to confine an optical mode of the first wavelength and the width and height of the second strip of light conducting semiconductor material are such that the second strip of light conducting semiconductor material is adapted to confine an optical mode of the second wavelength but is too narrow to confine an optical mode of the first wavelength.Type: GrantFiled: May 29, 2014Date of Patent: August 8, 2017Assignee: HRL Laboratories, LLCInventors: Daniel Yap, Troy Rockwood, Kevin Geary, Sarabjit Mehta
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Patent number: 9660314Abstract: A tunable antenna includes a patch antenna including a substrate, a metallic patch mounted on a first side of the substrate, a signal line connected through the substrate to the metallic patch, and a ground plane on a second side of the substrate opposite the first side. The tunable antenna includes an ionizable gas adjacent to the patch antenna.Type: GrantFiled: July 24, 2013Date of Patent: May 23, 2017Assignee: HRL Laboratories, LLCInventor: Sarabjit Mehta
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Patent number: 9520525Abstract: An infrared photo-detector with multiple discrete regions of a first absorber material. These regions may have geometric shapes with sloped sidewalls. The detector also may include a second absorber region comprising a second absorber material that absorbs light of a shorter wavelength than the light absorbed by the multiple discrete absorber regions of the first absorber material. The geometric shapes may extend only through the first absorber material. Alternatively, the geometric shapes may extend partially into the second absorber region. The detector has a metal reflector coupled to the multiple discrete absorber regions. The detector also has a substrate containing the discrete absorber regions and the second absorber region. The substrate can further include geometric shaped features etched into the substrate, with those features formed on the side of the substrate opposite the side containing the discrete absorber regions and the second absorber region.Type: GrantFiled: January 9, 2015Date of Patent: December 13, 2016Assignee: HRL Laboratories, LLCInventors: Daniel Yap, Rajesh D. Rajavel, Sarabjit Mehta, Hasan Sharifi
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Patent number: 8969986Abstract: An infrared photo-detector with multiple discrete regions of a first absorber material. These regions may have geometric shapes with sloped sidewalls. The detector also may include a second absorber region comprising a second absorber material that absorbs light of a shorter wavelength than the light absorbed by the multiple discrete absorber regions of the first absorber material. The geometric shapes may extend only through the first absorber material. Alternatively, the geometric shapes may extend partially into the second absorber region. The detector has a metal reflector coupled to the multiple discrete absorber regions. The detector also has a substrate containing the discrete absorber regions and the second absorber region. The substrate can further include geometric shaped features etched into the substrate, with those features formed on the side of the substrate opposite the side containing the discrete absorber regions and the second absorber region.Type: GrantFiled: February 28, 2011Date of Patent: March 3, 2015Assignee: HRL Laboratories, LLCInventors: Daniel Yap, Rajesh D. Rajavel, Sarabjit Mehta, Hasan Sharifi
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Patent number: 8946839Abstract: An absorber is disclosed. The disclosed absorber contains a base layer, and a plurality of pillars disposed above the base layer and composed of material configured to absorb an incident light and generate minority electrical carriers and majority electrical carrier, wherein the height of the pillars is predetermined to provide a common pyramidal outline shared by the pillars in the plurality of pillars.Type: GrantFiled: August 20, 2009Date of Patent: February 3, 2015Assignee: HRL Laboratories, LLCInventors: Daniel Yap, Rajesh D. Rajavel, Sarabjit Mehta, James H. Schaffner
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Patent number: 7992271Abstract: A processes for manufacturing actuating assembly for tuning a circuit by forming a carrier substrate containing a membrane, a conductive layer, and piezoelectric actuators are disclosed.Type: GrantFiled: November 20, 2009Date of Patent: August 9, 2011Assignee: HRL Laboratories, LLCInventor: Sarabjit Mehta
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Patent number: 7928389Abstract: An apparatus and method for a detector are disclosed. The apparatus disclosed contains an extractor layer, an absorber layer disposed adjacent to the extractor layer, a first electrical contact and a second electrical contact. The absorber layer is configured to absorb photons of incident light and generate minority electrical carriers and majority electrical carriers. In the disclosed apparatus, the top surface of the absorber layer is shaped as a pyramid, the extractor layer is electrically connected with the absorber layer and with the first electrical contact for extracting the minority electrical carriers, and the absorber layer is electrically connected with the extractor layer and with the second electrical contact to extract the majority electrical carriers.Type: GrantFiled: August 20, 2009Date of Patent: April 19, 2011Assignee: HRL Laboratories, LLCInventors: Daniel Yap, Rajesh D. Rajavel, Sarabjit Mehta, Joseph S. Colburn
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Patent number: 7868829Abstract: A reflectarray is disclosed. The reflectarray includes a first array of conductive patches supported by a substrate, wherein each conductive patch in the first array has a first center line along a Y-direction and a second centerline along an X-direction, a plurality of first variable capacitors, wherein each first variable capacitor is electrically coupled to one of the conductive patches in the first array along the first centerline, and a plurality of second variable capacitors, wherein each second variable capacitor is electrically coupled to one of the conductive patches in the first array along the second centerline.Type: GrantFiled: March 21, 2008Date of Patent: January 11, 2011Assignee: HRL Laboratories, LLCInventors: Joseph S. Colburn, Daniel F. Sievenpiper, Sarabjit Mehta
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Patent number: 7861398Abstract: A method for fabrication of a filter includes forming an input transformer pole in a first substrate by forming a first conductive via, forming an output transformer pole in the first substrate by forming a second conductive via, forming one or more filter poles in the first substrate between the input transformer pole and the output transformer pole by forming one or more conductive vias in the first substrate between the input transformer pole and the output transformer pole, fabricating one or more tuning elements on a second substrate, wherein the number of tuning elements corresponds to the number of filter poles between the input transformer pole and the output transformer pole, and bonding the second substrate to a top surface of the first substrate so that each tuning element on the second substrate is aligned with and overlays a filter pole on the first substrate.Type: GrantFiled: June 19, 2008Date of Patent: January 4, 2011Assignee: HRL Laboratories, LLCInventors: Sarabjit Mehta, Peter Petre
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Publication number: 20100064493Abstract: An actuating assembly for tuning a circuit and a process for forming a carrier substrate containing a membrane, a conductive layer, and piezoelectric actuators are disclosed. The actuating assembly comprises a membrane overlying a circuit to be tuned, a conductive element connected with the membrane, and a piezoelectric arrangement. Changes in shape of the piezoelectric arrangement allow a deflection of the membrane and a corresponding controllable upward or downward movement of the conductive element. In the process, a membrane and a piezoelectric structure are formed on a substrate.Type: ApplicationFiled: November 20, 2009Publication date: March 18, 2010Applicant: HRL LABORATORIES, LLCInventor: Sarabjit MEHTA
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Patent number: 7656071Abstract: An actuating assembly for tuning a circuit and a process for forming a carrier substrate containing a membrane, a conductive layer, and piezoelectric actuators are disclosed. The actuating assembly comprises a membrane overlying a circuit to be tuned, a conductive element connected with the membrane, and a piezoelectric arrangement. Changes in shape of the piezoelectric arrangement allow a deflection of the membrane and a corresponding controllable upward or downward movement of the conductive element. In the process, a membrane and a piezoelectric structure are formed on a substrate.Type: GrantFiled: April 22, 2003Date of Patent: February 2, 2010Assignee: HRL Laboratories, LLCInventor: Sarabjit Mehta
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Patent number: 7514759Abstract: A process for fabricating a combined micro electromechanical/gallium nitride structure. The micro electromechanical structure comprises a piezoelectric device, such as a piezoelectric switch or a bulk acoustic wave device. According to the process, high Q compact bulk acoustic wave resonators can be built. The process is applicable to technologies such as tunable planar filter technology, amplifier technology and high speed analog-to-digital converters.Type: GrantFiled: April 11, 2005Date of Patent: April 7, 2009Assignee: HRL Laboratories, LLCInventors: Sarabjit Mehta, David E. Grider, Wah S. Wong
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Patent number: 7405637Abstract: A miniature tunable filter comprising filter poles disposed with a filter substrate. A moveable electrically conductive membrane is disposed above each filter pole and is spaced from the filter pole by an air or vacuum gap. The gap spacing is changed by deflecting the membrane with an electrostatic voltage. The change in gap spacing varies the capacitive loading at the pole, thus providing tuning of the filter. The electrically conductive membrane is preferably manufactured on a separate substrate that is bonded to the filter body containing the filter substrate.Type: GrantFiled: June 23, 2005Date of Patent: July 29, 2008Assignee: HRL Laboratories, LLCInventors: Sarabjit Mehta, Peter Petre
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Patent number: 7400488Abstract: A device for varying the capacitance of an electronic circuit is disclosed. The device comprises a flexible membrane located above the electronic circuit, a metal layer connected to the flexible membrane, and bias circuitry located above the membrane. Variation of the capacitance of the electronic circuit is obtained by pulling the membrane upwards by means of the bias circuitry. The disclosed device provides a sizeable capacitance variation and high Q factor, resulting in overall low filter insertion loss. A nearly constant group delay over a wide operating bandwidth is also obtained.Type: GrantFiled: November 30, 2006Date of Patent: July 15, 2008Assignee: HRL Laboratories, LLCInventors: Jonathan J. Lynch, Sarabjit Mehta, John Pasiecznik, Peter Petre
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Patent number: 7343655Abstract: A method of fabricating a micro electromechanical switch on a substrate comprising piezoelectric layers, metal electrodes alternated with the layers and contact pads. Cross voltages are applied to the electrodes, in order to obtain an S-shaped deformation of the switch and allow contact between the contact pads. Additionally, a further electrode can be provided on a substrate where the switch is fabricated, to allow an additional electrostatic effect during movement of the piezoelectric layers to obtain contact between the contact pads. The overall dimensions of the switch are very small and the required actuation voltage is very low, when compared to existing switches.Type: GrantFiled: January 27, 2005Date of Patent: March 18, 2008Assignee: HRL Laboratories, LLCInventor: Sarabjit Mehta
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Patent number: 7215064Abstract: A piezoelectric switch for tunable electronic components comprises piezoelectric layers, metal electrodes alternated with the layers and contact pads. Cross voltages are applied to the electrodes, in order to obtain an S-shaped deformation of the switch and allow contact between the contact pads. Additionally, a further electrode can be provided on a substrate where the switch is fabricated, to allow an additional electrostatic effect during movement of the piezoelectric layers to obtain contact between the contact pads. The overall dimensions of the switch are very small and the required actuation voltage is very low, when compared to existing switches.Type: GrantFiled: January 27, 2005Date of Patent: May 8, 2007Assignee: HRL Laboratories, LLCInventor: Sarabjit Mehta
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Publication number: 20070070576Abstract: A device for varying the capacitance of an electronic circuit is disclosed. The device comprises a flexible membrane located above the electronic circuit, a metal layer connected to the flexible membrane, and bias circuitry located above the membrane. Variation of the capacitance of the electronic circuit is obtained by pulling the membrane upwards by means of the bias circuitry. The disclosed device provides a sizeable capacitance variation and high Q factor, resulting in overall low filter insertion loss. A nearly constant group delay over a wide operating bandwidth is also obtained.Type: ApplicationFiled: November 30, 2006Publication date: March 29, 2007Inventors: Jonathan Lynch, Sarabjit Mehta, John Pasiecznik, Peter Petre