Patents by Inventor Sarah Liu

Sarah Liu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240126859
    Abstract: Methods, apparatus, and processor-readable storage media for authenticating usage data for processing by machine learning models are provided herein. An example method includes receiving, by a machine learning application installed in a user space of an operating system of a user device, a message from a software component, wherein the software component is: configured to collect usage data associated with the user device; signed with using private key corresponding to a digital certificate by an application installed on the user device; and deployed in a kernel space of the operating system, and wherein the message comprises usage data signed using the private key; authenticating, by the machine learning application, the usage data based on a public key corresponding to the digital certificate; and processing, by the machine learning application in response to a result of the authenticating, at least a portion of the authenticated usage data.
    Type: Application
    Filed: October 17, 2022
    Publication date: April 18, 2024
    Inventors: Jinpeng Liu, Tianxiang Chen, Sarah Evans, Zhen Jia
  • Patent number: 11948694
    Abstract: Mechanisms are provided for compartmental epidemiological computer modeling based on mobility data. Machine learning training of an isolation rate prediction computer model is performed to generate a trained isolation rate prediction model that predicts an isolation rate of a biological population. Isolation data is received which comprises data indicating a measure of mobility of the biological population. The trained isolation rate prediction model is executed on input features extracted from the isolation data to generate a predicted isolation rate. A compartmental epidemiological computer model, comprising a plurality of compartments representing states of a population with regard to an infectious disease, is executed to simulate a progression of the infectious disease and flows of portions of the population from between compartments in the compartmental epidemiological computer model are controlled based on the predicted isolation rate.
    Type: Grant
    Filed: May 12, 2021
    Date of Patent: April 2, 2024
    Inventors: Vishrawas Gopalakrishnan, Sayali Navalekar, James H. Kaufman, Simone Bianco, Kun Hu, Ajay Ashok Deshpande, Sarah Kefayati, Ujwal Reddy Moramganti, George Sirbu, Xuan Liu, Raman Srinivasan, Pan Ding
  • Patent number: 11947192
    Abstract: A contact lens comprising one or more microchannels for transport of liquid through the lens is provided. The contact lens can be made by contacting a curable composition with a microfiber that is insoluble in the curable composition; curing the curable composition to provide a polymeric lens body with the microfiber embedded therein; and contacting the polymeric lens body with a solvent to dissolve the microfiber.
    Type: Grant
    Filed: December 6, 2022
    Date of Patent: April 2, 2024
    Assignee: COOPERVISION INTERNATIONAL LIMITED
    Inventors: Sourav Saha, Victoria Rogers, Charles B. Derringer, Sarah Tao, Szeshen Chuah, Yuan Sun, Yuwen Liu, Nancy Keir, Tim Warren, Matthew S. Linn, Lu Jiang
  • Publication number: 20240098298
    Abstract: Multiple global motion models associated with respective segments of a current frame are decoded from a compressed bitstream. Each global motion model is based on a segmentation of the current frame and represents a respective underlying motion of blocks within a respective segment. Blocks of the current frame are decoded by: for each inter-predicted block of a segment, decoding, form the compressed bitstream, an indication of whether to decode the each inter-predicted block based on a global motion model of the multiple global motion models and associated with the segment, or whether to decode the each inter-predicted block based on a motion vector that is different from the global motion model; and decoding the each inter-predicted block based on the indication.
    Type: Application
    Filed: November 28, 2023
    Publication date: March 21, 2024
    Inventors: Debargha Mukherjee, Yuxin Liu, Sarah Parker
  • Patent number: 11934256
    Abstract: In accordance with various embodiments of the present disclosure, a first instance of a data intake and query system (DIQS) may receive latency data that indicates latency states of second instances of the DIQS, the latency states indicative of latencies associated with processing of event data by the plurality of second instances. The first instance may then determine overall latency state of the first instance based, at least in part, on determining number or percentage of the first instance and the second instances of the DIQS having one or more particular latency states, and determining whether the number or percentage of the first instance and the f second instances of the DIQS having the one or more particular latency states is equal to or exceeds a threshold. The first instance may then present the overall latency state of the first instance.
    Type: Grant
    Filed: June 1, 2021
    Date of Patent: March 19, 2024
    Assignee: SPLUNK INC.
    Inventors: Vitaly Akulov, Amritpal Singh Bath, William King Colgate, Sarah Harun, Jibang Liu, Vishal Patel, Tingjin Xu
  • Patent number: 9543374
    Abstract: A method for adding a low TCR resistor to a baseline CMOS manufacturing flow. A method of forming a low TCR resistor in a CMOS manufacturing flow. A method of forming an n-type and a p-type transistor with a low TCR resistor in a CMOS manufacturing flow.
    Type: Grant
    Filed: December 15, 2014
    Date of Patent: January 10, 2017
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Greg Charles Baldwin, Kamel Benaissa, Sarah Liu, Song Zhao
  • Publication number: 20150171158
    Abstract: A method for adding a low TCR resistor to a baseline CMOS manufacturing flow. A method of forming a low TCR resistor in a CMOS manufacturing flow. A method of forming an n-type and a p-type transistor with a low TCR resistor in a CMOS manufacturing flow.
    Type: Application
    Filed: December 15, 2014
    Publication date: June 18, 2015
    Inventors: Greg Charles BALDWIN, Kamel BENAISSA, Sarah LIU, Song Zhao
  • Patent number: 8940598
    Abstract: A method for adding a low TCR resistor to a baseline CMOS manufacturing flow. A method of forming a low TCR resistor in a CMOS manufacturing flow. A method of forming an n-type and a p-type transistor with a low TCR resistor in a CMOS manufacturing flow.
    Type: Grant
    Filed: November 3, 2011
    Date of Patent: January 27, 2015
    Assignee: Texas Instruments Incorporated
    Inventors: Greg Charles Baldwin, Kamel Benaissa, Sarah Liu, Song Zhao
  • Publication number: 20120108020
    Abstract: A method for adding a low TCR resistor to a baseline CMOS manufacturing flow. A method of forming a low TCR resistor in a CMOS manufacturing flow. A method of forming an n-type and a p-type transistor with a low TCR resistor in a CMOS manufacturing flow.
    Type: Application
    Filed: November 3, 2011
    Publication date: May 3, 2012
    Applicant: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Greg Charles BALDWIN, Kamel BENAISSA, Sarah LIU, Song Zhao
  • Publication number: 20060166457
    Abstract: A method for manufacturing a semiconductor wafer 10 that includes implanting source/drain regions 75 within a top surface of the semiconductor substrate 20, forming a dielectric capping layer 170 over the semiconductor wafer 20, and annealing the semiconductor wafer 10 to activate sources/drains 70. The method further includes forming a layer of photoresist 180 and then patterning the layer of photoresist 180 to protect a middle portion of the polysilicon layer 100 of the non-silicided poly resistor stacks 30, etching the exposed portions of the dielectric capping layer 170, and removing the patterned photoresist 180. A layer of silicidation metal 190 is formed over the semiconductor wafer 10, and a silicide anneal is performed to create a silicide 160 within a top surface of said sources/drains 70 and also within unprotected top portions of the polysilicon layer 100 of the non-silicided poly resistors 30. Then the remaining portions of the dielectric capping layer 170 are etched.
    Type: Application
    Filed: January 21, 2005
    Publication date: July 27, 2006
    Inventors: Sarah Liu, Greg Baldwin, Haowen Bu, Shashank Ekbote