Patents by Inventor Saravan Arunachalam

Saravan Arunachalam has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Method and system for PHY loop detection
    Patent number: 8009571
    Abstract: A method, system and apparatus are provided for detecting a loop-back in a physical layer on an Ethernet link. In the physical layer, a device sends a base page on the Ethernet link. The base page has at least one next page capability bit set. Subsequently, the device receives a received base page. Thereafter, for detecting the loop-back, the next page capability bit is set in the received base page is determined.
    Type: Grant
    Filed: April 7, 2010
    Date of Patent: August 30, 2011
    Assignee: Cisco Technology, Inc.
    Inventors: Saravan Arunachalam, Hugh Barrass
  • METHOD AND SYSTEM FOR PHY LOOP DETECTION
    Publication number: 20100191794
    Abstract: A method, system and apparatus are provided for detecting a loop-back in a physical layer on an Ethernet link. In the physical layer, a device sends a base page on the Ethernet link. The base page has at least one next page capability bit set. Subsequently, the device receives a received base page. Thereafter, for detecting the loop-back, the next page capability bit is set in the received base page is determined.
    Type: Application
    Filed: April 7, 2010
    Publication date: July 29, 2010
    Applicant: Cisco Technology, Inc.
    Inventors: Saravan Arunachalam, Hugh Barrass
  • Method and system for PHY loop detection
    Patent number: 7701862
    Abstract: A method, system and apparatus are provided for detecting a loop-back in a physical layer on an Ethernet link. In the physical layer, a device sends a base page on the Ethernet link. The base page has at least one next page capability bit set. Subsequently, the device receives a received base page. Thereafter, for detecting the loop-back, the next page capability bit is set in the received base page is determined.
    Type: Grant
    Filed: November 25, 2005
    Date of Patent: April 20, 2010
    Assignee: Cisco Technology, Inc.
    Inventors: Saravan Arunachalam, Hugh Barrass
  • Method and system for PHY loop detection
    Publication number: 20070121518
    Abstract: A method, system and apparatus are provided for detecting a loop-back in a physical layer on an Ethernet link. In the physical layer, a device sends a base page on the Ethernet link. The base page has at least one next page capability bit set. Subsequently, the device receives a received base page. Thereafter, for detecting the loop-back, the next page capability bit is set in the received base page is determined.
    Type: Application
    Filed: November 25, 2005
    Publication date: May 31, 2007
    Applicant: Cisco Technology, Inc.
    Inventors: Saravan Arunachalam, Hugh Barrass