Patents by Inventor Sari SULTAN

Sari SULTAN has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12204452
    Abstract: A method to obtain a cache miss ratio curve where a memory blocks of a cache have variable block sizes. By stacking sets of counters, each set being for a different block size, a stack distance for variable block sizes can be obtained and used to determine a miss ratio curve. Such curve can then be used to select a cache size that is appropriate for an application without requiring excessive memory. Methods can be used for batches of request, can apply limits to block sizes, and rounding for intermediary block sizes, they can be used with pruning, and their space complexity can be held constant.
    Type: Grant
    Filed: November 7, 2022
    Date of Patent: January 21, 2025
    Assignees: HUAWEI TECHNOLOGIES CANADA CO., LTD., THE GOVERNING COUNCIL OF THE UNIVERSITY OF TORONTO
    Inventors: Sari Sultan, Kia Shakiba, Albert Lee, Michael Stumm, Ming Chen, Chung-Man Abelard Chow
  • Publication number: 20240160572
    Abstract: A method to obtain a cache miss ratio curve where a memory blocks of a cache have variable block sizes. By stacking sets of counters, each set being for a different block size, a stack distance for variable block sizes can be obtained and used to determine a miss ratio curve. Such curve can then be used to select a cache size that is appropriate for an application without requiring excessive memory. Methods can be used for batches of request, can apply limits to block sizes, and rounding for intermediary block sizes, they can be used with pruning, and their space complexity can be held constant.
    Type: Application
    Filed: November 7, 2022
    Publication date: May 16, 2024
    Applicants: HUAWEI TECHNOLOGIES CANADA CO., LTD., The Governing Council of the University of Toronto
    Inventors: Sari SULTAN, Kia SHAKIBA, Albert LEE, Michael STUMM, Ming CHEN, Chung-Man Abelard CHOW
  • Publication number: 20240152467
    Abstract: For a given application, increasing the size of a cache is beneficial up to a certain point and the number of hits does not increase significantly with a greater cache size. This disclosure provides a method to determine a miss ratio curve, for a cache having data blocks with a time-to-live. A hashed value of a data block's key address can be used to generate a 2D HLL counter for storing expiry times of the data blocks. The 2D HLL counter can be converted to a 1D array, from which a stack distance can be calculated. A frequency distribution of stack distances can then be converted into a miss ratio curve, from which an appropriate cache size can be selected.
    Type: Application
    Filed: November 7, 2022
    Publication date: May 9, 2024
    Applicants: HUAWEI TECHNOLOGIES CANADA CO., LTD., The Governing Council of the University of Toronto
    Inventors: Sari SULTAN, Kia SHAKIBA, Albert LEE, Michael STUMM, Ming CHEN, Chung-Man Abelard CHOW