Patents by Inventor Sarit Dhar
Sarit Dhar has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9984894Abstract: Methods of forming a semiconductor structure include providing an insulation layer on a semiconductor layer and diffusing cesium ions into the insulation layer from a cesium ion source outside the insulation layer. A MOSFET including an insulation layer treated with cesium ions may exhibit increased inversion layer mobility.Type: GrantFiled: August 3, 2011Date of Patent: May 29, 2018Assignees: Cree, Inc., Auburn UniversityInventors: Sarit Dhar, Sei-Hyung Ryu, Anant Agarwal, John Robert Williams
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Patent number: 9478616Abstract: Semiconductor devices having a high performance channel and method of fabrication thereof are disclosed. Preferably, the semiconductor devices are Metal-Oxide-Semiconductor (MOS) devices, and even more preferably the semiconductor devices are Silicon Carbide (SiC) MOS devices. In one embodiment, a semiconductor device includes a SiC substrate of a first conductivity type, a first well of a second conductivity type, a second well of the second conductivity type, and a surface diffused channel of the second conductivity type formed at the surface of semiconductor device between the first and second wells. A depth and doping concentration of the surface diffused channel are controlled to provide increased carrier mobility for the semiconductor device as compared to the same semiconductor device without the surface diffused channel region when in the on-state while retaining a turn-on, or threshold, voltage that provides normally-off behavior.Type: GrantFiled: March 3, 2011Date of Patent: October 25, 2016Assignee: Cree, Inc.Inventors: Sarit Dhar, Sei-Hyung Ryu, Lin Cheng, Anant Agarwal
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Patent number: 9396946Abstract: Embodiments of a semiconductor device having increased channel mobility and methods of manufacturing thereof are disclosed. In one embodiment, the semiconductor device includes a substrate including a channel region and a gate stack on the substrate over the channel region. The gate stack includes an alkaline earth metal. In one embodiment, the alkaline earth metal is Barium (Ba). In another embodiment, the alkaline earth metal is Strontium (Sr). The alkaline earth metal results in a substantial improvement of the channel mobility of the semiconductor device.Type: GrantFiled: September 9, 2011Date of Patent: July 19, 2016Assignee: Cree, Inc.Inventors: Sarit Dhar, Lin Cheng, Sei-Hyung Ryu, Anant Agarwal, John Williams Palmour, Erik Maki, Jason Gurganus, Daniel Jenner Lichtenwalner
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Patent number: 9343540Abstract: A metal-insulator-semiconductor field-effect transistor (MISFET) includes a SiC layer with source and drain regions of a first conductivity type spaced apart therein. A first gate insulation layer is on the SiC layer and has a net charge along an interface with the SiC layer that is the same polarity as majority carriers of the source region. A gate contact is on the first gate insulation layer over a channel region of the SiC layer between the source and drain regions. The net charge along the interface between the first gate insulation layer and the SiC layer may deplete majority carriers from an adjacent portion of the channel region between the source and drain regions in the SiC layer, which may increase the threshold voltage of the MISFET and/or increase the electron mobility therein.Type: GrantFiled: August 14, 2014Date of Patent: May 17, 2016Assignee: Cree, Inc.Inventors: Sarit Dhar, Sei-Hyung Ryu
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Patent number: 9312343Abstract: A transistor may include a semiconductor drift layer of a first semiconductor material and a semiconductor channel layer on the semiconductor drift layer. The semiconductor channel layer may include a second semiconductor material different than the first semiconductor material. A semiconductor interconnection layer may be electrically coupled between the semiconductor drift layer and the semiconductor channel layer, and the semiconductor interconnection layer may include a third semiconductor material different than the first and second semiconductor materials. In addition, a control electrode may be provided on the semiconductor channel layer.Type: GrantFiled: October 13, 2009Date of Patent: April 12, 2016Assignee: Cree, Inc.Inventors: Qingchun Zhang, Sei-Hyung Ryu, Anant K. Agarwal, Sarit Dhar
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Patent number: 9269580Abstract: Embodiments of a semiconductor device having increased channel mobility and methods of manufacturing thereof are disclosed. In one embodiment, the semiconductor device includes a substrate including a channel region and a gate stack on the substrate over the channel region. The gate stack includes an alkaline earth metal. In one embodiment, the alkaline earth metal is Barium (Ba). In another embodiment, the alkaline earth metal is Strontium (Sr). The alkaline earth metal results in a substantial improvement of the channel mobility of the semiconductor device.Type: GrantFiled: September 9, 2011Date of Patent: February 23, 2016Assignee: Cree, Inc.Inventors: Sarit Dhar, Lin Cheng, Sei-Hyung Ryu, Anant Agarwal, John Williams Palmour, Jason Gurganus
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Publication number: 20150325655Abstract: A metal-insulator-semiconductor field-effect transistor (MISFET) includes a SiC layer with source and drain regions of a first conductivity type spaced apart therein. A first gate insulation layer is on the SiC layer and has a net charge along an interface with the SiC layer that is the same polarity as majority carriers of the source region. A gate contact is on the first gate insulation layer over a channel region of the SiC layer between the source and drain regions. The net charge along the interface between the first gate insulation layer and the SiC layer may deplete majority carriers from an adjacent portion of the channel region between the source and drain regions in the SiC layer, which may increase the threshold voltage of the MISFET and/or increase the electron mobility therein.Type: ApplicationFiled: August 14, 2014Publication date: November 12, 2015Inventors: Sarit DHAR, Sei-Hyung Ryu
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Patent number: 9142662Abstract: A semiconductor device includes a drift layer having a first conductivity type, a well region in the drift layer having a second conductivity type opposite the first conductivity type, and a source region in the well region, The source region has the first conductivity type and defines a channel region in the well region. The source region includes a lateral source region adjacent the channel region and a plurality of source contact regions extending away from the lateral source region opposite the channel region. A body contact region having the second conductivity type is between at least two of the plurality of source contact regions and is in contact with the well region. A source ohmic contact overlaps at least one of the source contact regions and the body contact region. A minimum dimension of a source contact area of the semiconductor device is defined by an area of overlap between the source ohmic contact and the at least one source contact region.Type: GrantFiled: May 16, 2011Date of Patent: September 22, 2015Assignee: Cree, Inc.Inventors: Sei-Hyung Ryu, Doyle Craig Capell, Lin Cheng, Sarit Dhar, Charlotte Jonas, Anant Agarwal, John Palmour
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Patent number: 9029945Abstract: A semiconductor device includes a drift layer having a first conductivity type, a well region in the drift layer having a second conductivity type opposite the first conductivity type, and a source region in the well region. The source region has the first conductivity type and defines a channel region in the well region. The source region includes a lateral source region adjacent the channel region and a plurality of source contact regions extending away from the lateral source region opposite the channel region. A body contact region having the second conductivity type is between at least two of the plurality of source contact regions and is in contact with the well region. A source ohmic contact overlaps at least one of the source contact regions and the body contact region. A minimum dimension of a source contact area of the semiconductor device is defined by an area of overlap between the source ohmic contact and the at least one source contact region.Type: GrantFiled: May 6, 2011Date of Patent: May 12, 2015Assignee: Cree, Inc.Inventors: Sei-Hyung Ryu, Doyle Craig Capell, Lin Cheng, Sarit Dhar, Charlotte Jonas, Anant Agarwal, John Palmour
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Patent number: 8841682Abstract: A metal-insulator-semiconductor field-effect transistor (MISFET) includes a SiC layer with source and drain regions of a first conductivity type spaced apart therein. A first gate insulation layer is on the SiC layer and has a net charge along an interface with the SiC layer that is the same polarity as majority carriers of the source region. A gate contact is on the first gate insulation layer over a channel region of the SiC layer between the source and drain regions. The net charge along the interface between the first gate insulation layer and the SiC layer may deplete majority carriers from an adjacent portion of the channel region between the source and drain regions in the SiC layer, which may increase the threshold voltage of the MISFET and/or increase the electron mobility therein.Type: GrantFiled: August 27, 2009Date of Patent: September 23, 2014Assignee: Cree, Inc.Inventors: Sarit Dhar, Sei-Hyung Ryu
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Publication number: 20130034941Abstract: Methods of forming a semiconductor structure include providing an insulation layer on a semiconductor layer and diffusing cesium ions into the insulation layer from a cesium ion source outside the insulation layer. A MOSFET including an insulation layer treated with cesium ions may exhibit increased inversion layer mobility.Type: ApplicationFiled: August 3, 2011Publication date: February 7, 2013Inventors: Sarit Dhar, Sei-Hyung Ryu, Anant Agarwal, John Robert Williams
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Publication number: 20120326163Abstract: Embodiments of a semiconductor device having increased channel mobility and methods of manufacturing thereof are disclosed. In one embodiment, the semiconductor device includes a substrate including a channel region and a gate stack on the substrate over the channel region. The gate stack includes an alkaline earth metal. In one embodiment, the alkaline earth metal is Barium (Ba). In another embodiment, the alkaline earth metal is Strontium (Sr). The alkaline earth metal results in a substantial improvement of the channel mobility of the semiconductor device.Type: ApplicationFiled: September 9, 2011Publication date: December 27, 2012Applicant: CREE, INC.Inventors: Sarit Dhar, Lin Cheng, Sei-Hyung Ryu, Anant Agarwal, John Williams Palmour, Jason Gurganus
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Publication number: 20120329216Abstract: Embodiments of a semiconductor device having increased channel mobility and methods of manufacturing thereof are disclosed. In one embodiment, the semiconductor device includes a substrate including a channel region and a gate stack on the substrate over the channel region. The gate stack includes an alkaline earth metal. In one embodiment, the alkaline earth metal is Barium (Ba). In another embodiment, the alkaline earth metal is Strontium (Sr). The alkaline earth metal results in a substantial improvement of the channel mobility of the semiconductor device.Type: ApplicationFiled: September 9, 2011Publication date: December 27, 2012Applicant: CREE, INC.Inventors: Sarit Dhar, Lin Cheng, Sei-Hyung Ryu, Anant Agarwal, John Williams Palmour, Erik Maki, Jason Gurganus, Daniel Jenner Lichtenwalner
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Publication number: 20120280270Abstract: A semiconductor device includes a drift layer having a first conductivity type, a well region in the drift layer having a second conductivity type opposite the first conductivity type, and a source region in the well region, The source region has the first conductivity type and defines a channel region in the well region. The source region includes a lateral source region adjacent the channel region and a plurality of source contact regions extending away from the lateral source region opposite the channel region. A body contact region having the second conductivity type is between at least two of the plurality of source contact regions and is in contact with the well region. A source ohmic contact overlaps at least one of the source contact regions and the body contact region. A minimum dimension of a source contact area of the semiconductor device is defined by an area of overlap between the source ohmic contact and the at least one source contact region.Type: ApplicationFiled: May 16, 2011Publication date: November 8, 2012Inventors: Sei-Hyung Ryu, Doyle Craig Capell, Lin Cheng, Sarit Dhar, Charlotte Jonas, Anant Agarwal, John Palmour
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Publication number: 20120280252Abstract: A semiconductor device includes a drift layer having a first conductivity type, a well region in the drift layer having a second conductivity type opposite the first conductivity type, and a source region in the well region, The source region has the first conductivity type and defines a channel region in the well region. The source region includes a lateral source region adjacent the channel region and a plurality of source contact regions extending away from the lateral source region opposite the channel region. A body contact region having the second conductivity type is between at least two of the plurality of source contact regions and is in contact with the well region. A source ohmic contact overlaps at least one of the source contact regions and the body contact region. A minimum dimension of a source contact area of the semiconductor device is defined by an area of overlap between the source ohmic contact and the at least one source contact region.Type: ApplicationFiled: May 6, 2011Publication date: November 8, 2012Inventors: Sei-Hyung Ryu, Doyle Craig Capell, Lin Cheng, Sarit Dhar, Charlotte Jonas, Anant Agarwal, John Palmour
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Publication number: 20120223330Abstract: Semiconductor devices having a high performance channel and method of fabrication thereof are disclosed. Preferably, the semiconductor devices are Metal-Oxide-Semiconductor (MOS) devices, and even more preferably the semiconductor devices are Silicon Carbide (SiC) MOS devices. In one embodiment, a semiconductor device includes a SiC substrate of a first conductivity type, a first well of a second conductivity type, a second well of the second conductivity type, and a surface diffused channel of the second conductivity type formed at the surface of semiconductor device between the first and second wells. A depth and doping concentration of the surface diffused channel are controlled to provide increased carrier mobility for the semiconductor device as compared to the same semiconductor device without the surface diffused channel region when in the on-state while retaining a turn-on, or threshold, voltage that provides normally-off behavior.Type: ApplicationFiled: March 3, 2011Publication date: September 6, 2012Applicant: CREE, INC.Inventors: Sarit Dhar, Sei-Hyung Ryu, Lin Cheng, Anant Agarwal
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Publication number: 20110147764Abstract: A metal-insulator-semiconductor field-effect transistor (MISFET) includes a semiconductor layer with source and drain regions of a first conductivity type spaced apart therein. A channel region of a first conductivity type extends between the source and drain regions. A gate contact is on the channel region. A dielectric channel depletion layer is between the gate contact and the channel region. The dielectric channel depletion layer provides a net charge having the same polarity as the first conductivity type charge carriers, and which may deplete the first conductivity type charge carriers from an adjacent portion of the channel region when no voltage is applied to the gate contact.Type: ApplicationFiled: November 4, 2009Publication date: June 23, 2011Inventors: Sarit Dhar, Sei-Hyung Ryu, Veena Misra, Daniel J. Lichtenwalner
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Publication number: 20110084284Abstract: A transistor may include a semiconductor drift layer of a first semiconductor material and a semiconductor channel layer on the semiconductor drift layer. The semiconductor channel layer may include a second semiconductor material different than the first semiconductor material. A semiconductor interconnection layer may be electrically coupled between the semiconductor drift layer and the semiconductor channel layer, and the semiconductor interconnection layer may include a third semiconductor material different than the first and second semiconductor materials. In addition, a control electrode may be provided on the semiconductor channel layer.Type: ApplicationFiled: October 13, 2009Publication date: April 14, 2011Inventors: Qingchun Zhang, Sei-Hyung Ryu, Anant K. Agarwal, Sarit Dhar
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Publication number: 20110049530Abstract: A metal-insulator-semiconductor field-effect transistor (MISFET) includes a SiC layer with source and drain regions of a first conductivity type spaced apart therein. A first gate insulation layer is on the SiC layer and has a net charge along an interface with the SiC layer that is the same polarity as majority carriers of the source region. A gate contact is on the first gate insulation layer over a channel region of the SiC layer between the source and drain regions. The net charge along the interface between the first gate insulation layer and the SiC layer may deplete majority carriers from an adjacent portion of the channel region between the source and drain regions in the SiC layer, which may increase the threshold voltage of the MISFET and/or increase the electron mobility therein.Type: ApplicationFiled: August 27, 2009Publication date: March 3, 2011Inventors: Sarit Dhar, Sei-Hyung Ryu