Abstract: Aspects of a storage device are provided which apply advanced thermal throttling in response to temperature changes based on multiple thermal power states for different types of cells, such as SLCs and MLCs. Initially, a controller determines that a temperature of the memory meets a thermal throttling threshold of a plurality of thermal throttling thresholds. Subsequently, the controller transitions into a thermal power state of a plurality of thermal power states when the temperature meets the thermal throttling threshold. The controller applies a thermal mitigation configuration associated with the thermal power state. The controller then determines that the temperature of the memory has reached a thermal equilibrium in the thermal power state based on the thermal mitigation configuration. Storage device performance is thus improved through advanced thermal throttling without compromising data integrity.

Abstract: Aspects of a storage device are provided that apply history-based prediction modeling in advanced thermal throttling. Initially, a controller determines a temperature prediction based one or more thermal mitigation parameters using a history-based prediction model. Subsequently, the controller determines whether the temperature prediction indicates that an actual temperature of the memory is expected to meet a thermal throttling threshold of a plurality of thermal throttling thresholds. The controller then transitions into a thermal power state of a plurality of thermal power states when the temperature prediction indicates that the actual temperature of the memory is expected to meet the thermal throttling threshold. The controller applies a thermal mitigation configuration associated with the thermal power state and determines that the temperature of the memory has reached a thermal equilibrium based on the thermal mitigation configuration.

Abstract: Aspects of a storage device are provided that apply history-based prediction modeling in advanced thermal throttling. Initially, a controller determines a temperature prediction based one or more thermal mitigation parameters using a history-based prediction model. Subsequently, the controller determines whether the temperature prediction indicates that an actual temperature of the memory is expected to meet a thermal throttling threshold of a plurality of thermal throttling thresholds. The controller then transitions into a thermal power state of a plurality of thermal power states when the temperature prediction indicates that the actual temperature of the memory is expected to meet the thermal throttling threshold. The controller applies a thermal mitigation configuration associated with the thermal power state and determines that the temperature of the memory has reached a thermal equilibrium based on the thermal mitigation configuration.

Abstract: Aspects of a storage device are provided that apply advanced thermal throttling with multi-tier extreme thermal throttling. Initially, a controller determines whether a first temperature measurement indicates that a temperature of the memory meets a first thermal threshold associated with a first-tier extreme thermal throttling or a second thermal threshold associated with a second-tier extreme thermal throttling. Subsequently, the controller enables the first-tier extreme thermal throttling when the temperature measurement indicates that the temperature of the memory meets the first thermal threshold, or the controller enables the second-tier extreme thermal throttling when the temperature measurement indicates that the temperature of the memory meets the second thermal threshold. The controller then determines whether a second temperature measurement indicates that the temperature of the memory has decreased to avoid thermal shutdown of the storage device.

Abstract: Aspects of a storage device are provided which apply advanced thermal throttling in response to temperature changes based on multiple thermal power states for different types of cells, such as SLCs and MLCs. Initially, a controller determines that a temperature of the memory meets a thermal throttling threshold of a plurality of thermal throttling thresholds. Subsequently, the controller transitions into a thermal power state of a plurality of thermal power states when the temperature meets the thermal throttling threshold. The controller applies a thermal mitigation configuration associated with the thermal power state. The controller then determines that the temperature of the memory has reached a thermal equilibrium in the thermal power state based on the thermal mitigation configuration. Storage device performance is thus improved through advanced thermal throttling without compromising data integrity.

Abstract: The present disclosure generally relates to split, non-operational power states for a data storage device. The data storage device can transition between the split, non-operational power states without advertising the transition to the host device. The power state parameters that are advertised to the host device are adjusted such that the host device is guided to the correct power decision based on the advertised power and duration. By splitting the non-operational power states, the data storage device does not incur additional transitional energy costs for short idle durations.

Abstract: The present disclosure generally relates to split, non-operational power states for a data storage device. The data storage device can transition between the split, non-operational power states without advertising the transition to the host device. The power state parameters that are advertised to the host device are adjusted such that the host device is guided to the correct power decision based on the advertised power and duration. By splitting the non-operational power states, the data storage device does not incur additional transitional energy costs for short idle durations.

Abstract: The present disclosure generally relates to split, non-operational power states for a data storage device. The data storage device can transition between the split, non-operational power states without advertising the transition to the host device. The power state parameters that are advertised to the host device are adjusted such that the host device is guided to the correct power decision based on the advertised power and duration. By splitting the non-operational power states, the data storage device does not incur additional transitional energy costs for short idle durations.