Patents by Inventor Sarvesh Verma

Sarvesh Verma has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Scan chain re-ordering in electronic circuit design based on region congestion in layout plan
    Patent number: 8443326
    Abstract: A method for reordering scan chain segments of scan chains in an electronic circuit design includes identifying congestion areas on a congestion map. A routing preference for each congestion area is determined. Scan cells associated with each congestion area are formed into the scan chain segments and then the scan chain segments are re-ordered based on the routing preference of the corresponding congestion area.
    Type: Grant
    Filed: April 10, 2012
    Date of Patent: May 14, 2013
    Assignee: Freescale Semiconductor, Inc.
    Inventors: Vishal Gupta, Sarvesh Verma