Patents by Inventor Sascha MOELLER
Sascha MOELLER has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20230238632Abstract: An energy storage system, including a housing in which a plurality of battery cells are arranged. The plurality of battery cells are spaced with respect to each other by a device arranged between every two respective adjacent battery cells of the plurality of battery cells, so that a space is created therein. At least one emergency cooling channel is associated with the space.Type: ApplicationFiled: June 8, 2021Publication date: July 27, 2023Inventors: Peter Kritzer, Fabian Hellweg, Sascha Moeller, Tim Leichner
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Patent number: 11255438Abstract: A seal arrangement for sealing a gap between a machine element comprising a shaft and a housing includes: at least one sealing element formed, at least partially, from polymeric material. The at least one sealing element is of annular design and is made of PTFE. The at least one sealing element has at least one first annular element and at least one second annular element. The at least one first element is electrically conductive and the at least one second element is electrically insulating. The at least one first element is arranged axially adjacently to the at least one second element. The at least one sealing element is provided with electrically conductive contact elements. The housing has an installation space forming an annular groove for the at least one sealing element. The installation space is provided with a lining forming an insulation.Type: GrantFiled: August 13, 2018Date of Patent: February 22, 2022Assignee: CARL FREUDENBERG KGInventors: Olaf Nahrwold, Stefan Sindlinger, Boris Traber, Sascha Moeller
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Patent number: 11168792Abstract: A sealing arrangement for sealing a gap between a machine element and a housing includes: at least one sealing element; and an insulation which electrically insulates the at least one sealing element from the machine element and the housing. The at least one sealing element is at least partially electrically conductive.Type: GrantFiled: August 13, 2018Date of Patent: November 9, 2021Assignee: CARL FREUDENBERG KGInventors: Olaf Nahrwold, Stefan Sindlinger, Boris Traber, Sascha Moeller
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Publication number: 20210305095Abstract: A semiconductor wafer having a plurality of die is attached to a support structure. The semiconductor wafer includes an active layer over a silicon layer, wherein the active layer is at a top side, and a bottom side exposes the silicon layer. While the wafer is attached to the support structure, an infrared laser beam is focused through a portion of the silicon layer to create a modification region along saw lanes located between neighboring die of the plurality of die. Afterwards, a metal layer is formed on the exposed silicon layer at the bottom side of the semiconductor wafer. The metal layer is attached to an expansion tape, and the wafer is singulated by extending the expansion tape to separate the die of the plurality of die along the saw lane. A first singulated die of the plurality of die is packaged to form a packaged semiconductor device.Type: ApplicationFiled: March 24, 2020Publication date: September 30, 2021Inventors: Sascha Moeller, Guido Albermann, Michael Zernack
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Patent number: 11011446Abstract: A semiconductor device and a method of making the same. The device includes a semiconductor substrate having a major surface, a backside and side surfaces extending between the major surface and the backside. The semiconductor device also includes at least one metal layer extending across the backside of the substrate. A peripheral part of the at least one metal layer located at the edge of the substrate between the backside and at least one of the side surfaces extends towards a plane containing the major surface. This can prevent burrs located at the peripheral part of the at least one metal layer interfering with the mounting of the backside of the substrate on the surface of a carrier.Type: GrantFiled: November 3, 2016Date of Patent: May 18, 2021Assignee: NEXPERIA B.V.Inventors: Tonny Kamphuis, Leo van Gemert, Hans van Rijckevorsel, Sascha Moeller, Hartmut Buenning, Steffen Holland, Y Kuang Huang
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Publication number: 20200370655Abstract: A sealing arrangement for sealing a gap between a machine element and a housing includes: at least one sealing element; and an insulation which electrically insulates the at least one sealing element from the machine element and the housing. The at least one sealing element is at least partially electrically conductive.Type: ApplicationFiled: August 13, 2018Publication date: November 26, 2020Inventors: Olaf Nahrwold, Stefan Sindlinger, Boris Traber, Sascha Moeller
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Publication number: 20200370653Abstract: A seal arrangement for sealing a gap between a machine element comprising a shaft and a housing includes: at least one sealing element formed, at least partially, from polymeric material. The at least one sealing element is of annular design and is made of PTFE. The at least one sealing element has at least one first annular element and at least one second annular element. The at least one first element is electrically conductive and the at least one second element is electrically insulating. The at least one first element is arranged axially adjacently to the at least one second element. The at least one sealing element is provided with electrically conductive contact elements. The housing has an installation space forming an annular groove for the at least one sealing element. The installation space is provided with a lining forming an insulation.Type: ApplicationFiled: August 13, 2018Publication date: November 26, 2020Inventors: Olaf Nahrwold, Stefan Sindlinger, Boris Traber, Sascha Moeller
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Publication number: 20190285182Abstract: A seal ring in the form of a grooved ring for sealing a movable machine element toward a stationary housing includes: a radially inner axial leg with a dynamic sealing edge; a radially outer axial leg with a static sealing edge; and a radial leg connecting the two axial legs. The seal ring is produced from a thermoplastic material. A recess is formed between the two axial legs and the radial leg. The radially inner axial leg has, on a surface of the radially inner axial leg on a machine element side, a rounded transition to a surface of the radial leg that faces away from a pressure.Type: ApplicationFiled: January 15, 2019Publication date: September 19, 2019Inventors: Sascha Moeller, Roland Fietz, Michael Groesch, Juergen Jaeckel, Gonzalo Barillas
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Patent number: 10347534Abstract: Embodiments are provided herein for separating integrated circuit (IC) device die of a wafer, the wafer having a front side with an active device region and a back side, the active device region having a plurality of active devices arranged in rows and columns and separated by cutting lanes, the method including: attaching the front side of the wafer onto a first dicing tape; forming a modification zone within each cutting lane through the back side of the wafer, wherein each modification zone has a first thickness near a corner of each active device and a second thickness near a center point of each active device, wherein the second thickness is less than the first thickness; and propagating cracks through each cutting lane to separate the plurality of active devices.Type: GrantFiled: September 12, 2017Date of Patent: July 9, 2019Assignee: NXP B.V.Inventors: Martin Lapke, Hartmut Buenning, Sascha Moeller, Guido Albermann, Michael Zernack, Leo M. Higgins, III
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Publication number: 20190080963Abstract: Embodiments are provided herein for separating integrated circuit (IC) device die of a wafer, the wafer having a front side with an active device region and a back side, the active device region having a plurality of active devices arranged in rows and columns and separated by cutting lanes, the method including: attaching the front side of the wafer onto a first dicing tape; forming a modification zone within each cutting lane through the back side of the wafer, wherein each modification zone has a first thickness near a corner of each active device and a second thickness near a center point of each active device, wherein the second thickness is less than the first thickness; and propagating cracks through each cutting lane to separate the plurality of active devices.Type: ApplicationFiled: September 12, 2017Publication date: March 14, 2019Inventors: Martin LAPKE, Hartmut Buenning, Sascha MOELLER, Guido ALBERMANN, Michael ZERNACK, Leo M. HIGGINS, III
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Patent number: 9847258Abstract: Consistent with an example embodiment, there is a method for preparing an integrated circuit (IC) device from a wafer substrate, the wafer substrate having a top-side surface with a plurality of active device die separated by saw lanes and an opposite under-side surface. The method comprises coating the under-side surface of the wafer substrate with a resilient coating, locating the position of the saw lanes from the underside surface, blade dicing trenches in the resilient material to expose under-side bulk material in the position of saw lanes, and plasma etching through the trenches to remove the exposed under-side bulk material.Type: GrantFiled: September 30, 2015Date of Patent: December 19, 2017Assignee: NXP B.V.Inventors: Thomas Rohleder, Hartmut Buenning, Guido Albermann, Sascha Moeller, Martin Lapke
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Patent number: 9812361Abstract: Consistent with an example embodiment, there is a method for preparing integrated circuit (IC) device die from a wafer substrate having a front-side with active devices and a back-side. The method comprises pre-grinding the backside of a wafer substrate to a thickness. The front-side of the wafer is mounted onto a protective foil. A laser is applied to the backside of the wafer, at first focus depth to define a secondary modification zone in saw lanes. To the backside of the wafer, a second laser process is applied, at a second focus depth shallower than that of the first focus depth, in the saw lanes to define a main modification zone, the secondary modification defined at a pre-determined location within active device boundaries, the active device boundaries defining an active device area. The backside of the wafer is ground down to a depth so as to remove the main modification zone. The IC device die are separated from one another by stretching the protective foil.Type: GrantFiled: March 11, 2014Date of Patent: November 7, 2017Assignee: NXP B.V.Inventors: Hartmut Buenning, Sascha Moeller, Guido Albermann, Martin Lapke, Thomas Rohleder
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Publication number: 20170148697Abstract: A semiconductor device and a method of making the same. The device includes a semiconductor substrate having a major surface, a backside and side surfaces extending between the major surface and the backside. The semiconductor device also includes at least one metal layer extending across the backside of the substrate. A peripheral part of the at least one metal layer located at the edge of the substrate between the backside and at least one of the side surfaces extends towards a plane containing the major surface. This can prevent burrs located at the peripheral part of the at least one metal layer interfering with the mounting of the backside of the substrate on the surface of a carrier.Type: ApplicationFiled: November 3, 2016Publication date: May 25, 2017Inventors: Tonny Kamphuis, Leo van Gemert, Hans van Rijckevorsel, Sascha Moeller, Hartmut Buenning, Steffen Holland, Y Kuang Huang
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Publication number: 20170092540Abstract: Consistent with an example embodiment, there is a method for preparing an integrated circuit (IC) device from a wafer substrate, the wafer substrate having a top-side surface with a plurality of active device die separated by saw lanes and an opposite under-side surface. The method comprises coating the under-side surface of the wafer substrate with a resilient coating, locating the position of the saw lanes from the underside surface, blade dicing trenches in the resilient material to expose under-side bulk material in the position of saw lanes, and plasma etching through the trenches to remove the exposed under-side bulk material.Type: ApplicationFiled: September 30, 2015Publication date: March 30, 2017Inventors: Thomas Rohleder, Hartmut Buenning, Guido Albermann, Sascha Moeller, Martin Lapke
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Patent number: 9601437Abstract: Consistent with an example embodiment, a method for preparing integrated circuit (IC) device die from a wafer substrate having a front-side with active devices and a back-side, comprises mounting the front-side of the wafer onto protective foil. A laser is applied to saw lane areas on the backside of the wafer, at a first focus depth to define a modification zone; the modification zone defined at a pre-determined depth within active device boundaries and the active device boundaries defined by the saw lane areas. The protective foil is stretched to separate IC device die from one another and expose active device side-walls. With dry-etching of the active device side-walls, the modification zone is substantially removed.Type: GrantFiled: September 9, 2014Date of Patent: March 21, 2017Assignee: NXP B.V.Inventors: Guido Albermann, Sascha Moeller, Thomas Rohleder, Martin Lapke, Hartmut Buenning
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Publication number: 20160172243Abstract: One example discloses a system for wafer material removal, including: a wafer structures map, identifying a first device structure having a first location and a second device structure having a second location; a material removal controller, coupled to the structures map, and having a material removal beam power level output signal and a material removal beam on/off status output signal; wherein the material removal controller is configured to select a first material removal beam power level and a first material removal beam on/off status corresponding to the first location; and wherein the material removal controller is configured to select a second material removal beam power level and a second material removal beam on/off status corresponding to the second location. Another example discloses an article of manufacture comprises at least one non-transitory, tangible machine readable storage medium containing executable machine instructions for wafer material removal.Type: ApplicationFiled: December 11, 2014Publication date: June 16, 2016Inventors: Sascha Moeller, Thomas Rohleder, Guido Albermann, Martin Lapke, Hartmut Buenning
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Patent number: 9349645Abstract: An apparatus, device and method for wafer dicing is disclosed. In one example, the apparatus discloses: a wafer holding device having a first temperature; a die separation bar moveably coupled to the wafer holding device; and a cooling device coupled to the apparatus and having a second temperature which enables the die separation bar to fracture an attachment material in response to movement with respect to the wafer holding device. In another example, the method discloses: receiving a wafer having an attachment material applied to one side of the wafer; placing the wafer in a holding device having a first temperature; urging a die separation bar toward the wafer; and cooling the attachment material to a second temperature, which is lower than the first temperature, until the attachment material fractures in response to the urging.Type: GrantFiled: October 16, 2013Date of Patent: May 24, 2016Assignee: NXP B.V.Inventors: Martin Lapke, Hartmut Buenning, Sascha Moeller, Guido Albermann, Thomas Rohleder, Heiko Backer
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Publication number: 20160071770Abstract: Consistent with an example embodiment, a method for preparing integrated circuit (IC) device die from a wafer substrate having a front-side with active devices and a back-side, comprises mounting the front-side of the wafer onto protective foil. A laser is applied to saw lane areas on the backside of the wafer, at a first focus depth to define a modification zone; the modification zone defined at a pre-determined depth within active device boundaries and the active device boundaries defined by the saw lane areas. The protective foil is stretched to separate IC device die from one another and expose active device side-walls. With dry-etching of the active device side-walls, the modification zone is substantially removed.Type: ApplicationFiled: September 9, 2014Publication date: March 10, 2016Inventors: Guido Albermann, Sascha Moeller, Thomas Rohleder, Martin Lapke, Hartmut Buenning
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Patent number: 9245804Abstract: Consistent with an example embodiment, there is a semiconductor device, with an active device having a front-side surface and a backside surface; the semiconductor device of an overall thickness, comprises an active device with circuitry defined on the front-side surface, the front-side surface having an area. The back-side of the active device has recesses f a partial depth of the active device thickness and a width of about the partial depth, the recesses surrounding the active device at vertical edges. There is a protective layer of a thickness on to the backside surface of the active device, the protective material having an area greater than the first area and having a stand-off distance. The vertical edges have the protective layer filling the recesses flush with the vertical edges. A stand-off distance of the protective material is a function of the semiconductor device thickness and the tangent of an angle (?) of tooling impact upon a vertical face the semiconductor device.Type: GrantFiled: August 14, 2013Date of Patent: January 26, 2016Assignee: NXP B.V.Inventors: Christian Zenz, Hartmut Buenning, Leonardus Antonius Elisabeth Van Gemert, Tonny Kamphuis, Sascha Moeller
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Patent number: 9196537Abstract: Consistent with an example embodiment, there is a method for assembling a wafer level chip scale processed (WLCSP) wafer; The wafer has a topside surface and an back-side surface, and a plurality of device die having electrical contacts on the topside surface. The method comprises back-grinding, to a thickness, the back-side surface the wafer. A protective layer of a thickness is molded onto the backside of the wafer. The wafer is mounted onto a sawing foil; along saw lanes of the plurality of device die, the wafer is sawed, the sawing occurring with a blade of a first kerf and to a depth of the thickness of the back-ground wafer. Again, the wafer is sawed along the saw lanes of the plurality of device die, the sawing occurring with a blade of a second kerf, the second kerf narrower than the first kerf, and sawing to a depth of the thickness of the protective layer. The plurality of device die are separated into individual device die.Type: GrantFiled: August 14, 2013Date of Patent: November 24, 2015Assignee: NXP B.V.Inventors: Leonardus Antonius Elisabeth Van Gemert, Hartmut Buenning, Tonny Kamphuis, Sascha Moeller, Christian Zenz