Patents by Inventor Sathish Shenoy

Sathish Shenoy has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8549251
    Abstract: In some embodiments, an apparatus includes a register having a first portion and a second portion. The first portion of the register has multiple bits and the second portion of the register has multiple bits. Each bit from the multiple bits of the first portion of the register is associated with a bit from the multiple bits of the second portion of the register such that a bit from the multiple bits of the first portion of the register is set for its associated bit from the multiple bits of the second portion of the register to be written.
    Type: Grant
    Filed: December 15, 2010
    Date of Patent: October 1, 2013
    Assignee: Juniper Networks, Inc.
    Inventors: Murali Vemula, Sathish Shenoy
  • Patent number: 8279863
    Abstract: In some embodiments, a method includes sending a signal to a first module associated with a stage of a switch fabric and receiving a signal from the first module a first amount of time after sending the signal to the first module. A signal is sent to a second module associated with the stage of the switch fabric and a signal is received from the second module a second amount of time after sending the signal to the second module. The second amount of time is less than the first amount of time. A cell of a first data packet is sent to the first module and a cell of a second data packet is sent to the second module a third amount of time after sending the cell of the first data packet. The third amount of time is associated with the difference between the first amount of time and the second amount of time.
    Type: Grant
    Filed: June 30, 2009
    Date of Patent: October 2, 2012
    Assignee: Juniper Networks, Inc.
    Inventors: Sathish Shenoy, Anurag Agrawal, Philip A. Thomas
  • Publication number: 20100329249
    Abstract: In some embodiments, a method includes sending a signal to a first module associated with a stage of a switch fabric and receiving a signal from the first module a first amount of time after sending the signal to the first module. A signal is sent to a second module associated with the stage of the switch fabric and a signal is received from the second module a second amount of time after sending the signal to the second module. The second amount of time is less than the first amount of time. A cell of a first data packet is sent to the first module and a cell of a second data packet is sent to the second module a third amount of time after sending the cell of the first data packet. The third amount of time is associated with the difference between the first amount of time and the second amount of time.
    Type: Application
    Filed: June 30, 2009
    Publication date: December 30, 2010
    Inventors: Sathish Shenoy, Anurag Agrawal, Philip A. Thomas
  • Publication number: 20100042656
    Abstract: The development-time testing of claims based applications. After a claims-based application is deployed, as the application runs, the application will encounter a number of claims, and will perform appropriate processing that depends on the application's trust in the veracity of the those claims. However, at development time, access to claims providers is either limited or non-existent. The principles described herein permit access to an environment at development-time in which the claims-based application will encounter any number and variety of claims. Accordingly, the application may be evaluated to verify proper operation in response to particular claims at development time, and any deviations in expected performance may be addressed prior to deployment.
    Type: Application
    Filed: August 18, 2008
    Publication date: February 18, 2010
    Applicant: Microsoft Corporation
    Inventors: Vijay K. Gajjala, Siddharth Sathish Shenoy