Patents by Inventor Satish Anand Verkila
Satish Anand Verkila has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 12249916Abstract: The present disclosure provides for a hybrid DC-DC, Hybrid Variable Switched Capacitor (HVSC) power converter. The converter may include one or more power switching networks supporting a plurality of power conversion modes and characterised in that: an input terminal connected to an input power source and an associated input capacitance, an output terminal connected to a load and an associated output capacitance to obtain a desired output voltage or output load current regulation; and at least six switches, one or more inductors and one or more flying capacitors. The converter addresses the problems faced by inductor-based and inductor-less DC-DC power converters while providing higher power conversion efficiencies alike the inductor-less switched capacitor converters and voltage/current regulation alike the inductor-based power converters in a single power conversion unit and enable a duty cycle-based output voltage/current regulation.Type: GrantFiled: January 4, 2023Date of Patent: March 11, 2025Assignee: SILICONCH SYSTEMS PVT LTDInventors: Kaustubh Kumar, Burle Naga Satyanarayana, Rakesh Kumar Polasa, Satish Anand Verkila
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Patent number: 11933841Abstract: The present disclosure provides a DFT architecture for ICs and a method for testing the ICs with the proposed DFT architecture. The present disclosure also includes a focus on USB PD protocol with respect to the DFT architecture. The present disclosure also includes focus on testing IC with single I/O pin. The DFT architecture primarily comprises of a test mode controller and reuses the USBPD protocol framework logic comprising analog USBPD CC circuitry in analog block and the USBPD signaling, protocol logic in digital block for the test purposes. The DFT architecture is implemented with analog test modes and digital test modes using a single I/O pin, wherein analog test modes comprises of analog trims and observation modes and digital test modes comprises of LBIST, ATPG and digital observation modes. The method disclosed is directed to the functions associated with testing the USBPD ICS using single I/O pin.Type: GrantFiled: October 6, 2021Date of Patent: March 19, 2024Assignee: SILICONCH SYSTEMS PVT LTDInventors: Munnangi Sirisha, Rakesh Kumar Polasa, Satish Anand Verkila
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Patent number: 11936231Abstract: Systems and methods for detecting electrical connection and disconnection on an USB Type-A charging port like power adapters, power banks and car chargers having one or more USB Type-A charging port of an USB device. The system includes: a voltage source; a MOSFET SWITCH gate driver, in USB type-A connected state, that operatively couples MOSFET SWITCH with voltage source and VBUS supply of USB type-A port; charge pump; a current sense differential amplifier; and a control unit configured to: monitor VBUS current, and detect potential disconnected state of connected USB type-A port; and monitor VBUS voltage and compare VBUS voltage with predetermined voltage to sense external condition such that VBUS voltage drops because of load capacitance and load current. The control unit is further configured to, when the duty cycle has reached a minimum VBUS current, detect the USB type-A disconnection with a charge pump state.Type: GrantFiled: December 12, 2022Date of Patent: March 19, 2024Assignee: SILICONCH SYSTEMS PVT LTDInventors: Rakesh Kumar Polasa, Satish Anand Verkila, Burle Naga Satyanarayana
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Publication number: 20230344365Abstract: The present disclosure provides for a multi-ratio switched capacitor power converter. The converter may include one or more power switching networks supporting a plurality of power conversion modes and characterised in that: an input terminal connected to an input power source and an associated input capacitance, an output terminal connected to a load and an associated output capacitance to obtain a desired output voltage or output load current regulation; and a switching network with one or more arrangements of switches. The one or more arrangements can be of at least twelve, ten or nine switches to provide for a multi ratio, multi mode power conversion system that addresses the problems faced by existing power converters.Type: ApplicationFiled: April 21, 2023Publication date: October 26, 2023Inventors: Kaustubh KUMAR, Burle Naga SATYANARAYANA, Rakesh Kumar POLASA, Satish Anand VERKILA
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Patent number: 11742756Abstract: The present disclosure provides a bidirectional hybrid power converter that may include an input circuit consisting of an input power supply and input capacitor, a plurality of switches connected to each other, to input power supply to a set of passive electronic components, to ground and to an output circuit comprising one or more output terminals, each consisting of an output capacitance. The plurality of switches is connected directly or through passive electronic components in an arrangement to obtain a plurality of power converter networks for battery charging as well as other applications by reuse of a set of plurality of switches. The input power supply and the output load are referred to based on the direction of the power conversion flow, forward or reverse. The first terminal can be connected to both a power source as an input and load as an output.Type: GrantFiled: January 18, 2022Date of Patent: August 29, 2023Assignee: SILICONCH SYSTEMS PVT LTDInventors: Kaustubh Kumar, Burle Naga Satyanarayana, Rakesh Kumar Polasa, Satish Anand Verkila
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Publication number: 20230216413Abstract: The present disclosure provides for a hybrid DC-DC, Hybrid Variable Switched Capacitor (HVSC) power converter. The converter may include one or more power switching networks supporting a plurality of power conversion modes and characterised in that: an input terminal connected to an input power source and an associated input capacitance, an output terminal connected to a load and an associated output capacitance to obtain a desired output voltage or output load current regulation; and at least six switches, one or more inductors and one or more flying capacitors. The converter addresses the problems faced by inductor-based and inductor-less DC-DC power converters while providing higher power conversion efficiencies alike the inductor-less switched capacitor converters and voltage/current regulation alike the inductor-based power converters in a single power conversion unit and enable a duty cycle-based output voltage/current regulation.Type: ApplicationFiled: January 4, 2023Publication date: July 6, 2023Inventors: Kaustubh KUMAR, Burle Naga SATYANARAYANA, Rakesh Kumar POLASA, Satish Anand VERKILA
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Patent number: 11689041Abstract: Systems and methods for detecting electrical connection and disconnection on an USB Type-A charging port like power adapters, power banks and car chargers having one or more USB Type-A charging port of an USB device. The system includes: a voltage source; a MOSFET SWITCH gate driver, in USB type-A connected state, that operatively couples MOSFET SWITCH with voltage source and VBUS supply of USB type-A port; charge pump; a current sense differential amplifier; and a control unit configured to: monitor VBUS current, and detect potential disconnected state of connected USB type-A port; and monitor VBUS voltage and compare VBUS voltage with predetermined voltage to sense external condition such that VBUS voltage drops because of load capacitance and load current. The control unit is further configured to, when the duty cycle has reached a minimum VBUS current, detect the USB type-A disconnection with a charge pump state.Type: GrantFiled: June 10, 2020Date of Patent: June 27, 2023Assignee: SiliConch Systems Pvt LtdInventors: Rakesh Kumar Polasa, Satish Anand Verkila, Burle Naga Satyanarayana
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Publication number: 20230106813Abstract: Systems and methods for detecting electrical connection and disconnection on an USB Type-A charging port like power adapters, power banks and car chargers having one or more USB Type-A charging port of an USB device. The system includes: a voltage source; a MOSFET SWITCH gate driver, in USB type-A connected state, that operatively couples MOSFET SWITCH with voltage source and VBUS supply of USB type-A port; charge pump; a current sense differential amplifier; and a control unit configured to: monitor VBUS current, and detect potential disconnected state of connected USB type-A port; and monitor VBUS voltage and compare VBUS voltage with predetermined voltage to sense external condition such that VBUS voltage drops because of load capacitance and load current. The control unit is further configured to, when the duty cycle has reached a minimum VBUS current, detect the USB type-A disconnection with a charge pump state.Type: ApplicationFiled: December 12, 2022Publication date: April 6, 2023Inventors: Rakesh Kumar POLASA, Satish Anand VERKILA, Burle Naga SATYANARAYANA
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Publication number: 20230013025Abstract: The present disclosure provides a bidirectional hybrid power converter that may include an input circuit consisting of an input power supply and input capacitor, a plurality of switches connected to each other, to input power supply to a set of passive electronic components, to ground and to an output circuit comprising one or more output terminals, each consisting of an output capacitance. The plurality of switches is connected directly or through passive electronic components in an arrangement to obtain a plurality of power converter networks for battery charging as well as other applications by reuse of a set of plurality of switches. The input power supply and the output load are referred to based on the direction of the power conversion flow, forward or reverse. The first terminal can be connected to both a power source as an input and load as an output.Type: ApplicationFiled: January 18, 2022Publication date: January 19, 2023Inventors: Kaustubh KUMAR, Burle Naga SATYANARAYANA, Rakesh Kumar POLASA, Satish Anand VERKILA
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Patent number: 11422599Abstract: The present disclosure provides a system and method for soft start scheme to control inrush current for VCONN in USB-C interface. The system includes: a serial shift register having flip-flops and adapted to obtain clock with programmable clock divider, frequency of clock changes dynamically by programming programmable clock divider; a resistor DAC unit configured to increment voltage in step-wise manner; a pass gate switch comprising NMOS gate switch and a PMOS gate switch connected in parallel and operatively coupled to the resistor DAC unit and configured to control an input voltage to a VCONN charge pump, said input voltage being in incremental steps such that the VCONN charge pump pumps an output voltage; and a VCONN switch gate operatively coupled to the VCONN charge pump and configured to supply the output voltage in controlled, incremental steps, such that the output voltage is ramped slowly to control the inrush current.Type: GrantFiled: June 29, 2020Date of Patent: August 23, 2022Assignee: SILICONCH SYSTEMS PVT LTDInventors: Ashok Kumar Jyani, Satish Anand Verkila, Shubham Paliwal, Rakesh Kumar Polasa
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Patent number: 11418282Abstract: The present disclosure provides a transceiver for transmission of data coded according to a Bi-phase Mark Coding (BMC) protocol through a configurable channel (CC) of a USB type-C port. The transceiver includes: a transmitter configured to receive the coded BMC data and transmit the coded BMC data through the CC line. The transmitter includes: a low dropout (LDO) regulator configured to receive a reference voltage (VREF) and generate a local programmable supply voltage; a delay control logic configured to receive the BMC data, and including flipflops connected in series, wherein, output from each flipflop is delayed with respect to input received by the flipflop; and a transmitter driver configured to receive output from each flipflop of the delay control logic, the transmitter driver including a NMOS switches and a PMOS switches. The transceiver includes an eye correction receiver configured to receive output from the transmitter driver of the transmitter.Type: GrantFiled: February 18, 2021Date of Patent: August 16, 2022Assignee: SILICONCH SYSTEMS PVT LTDInventors: S V Kalyani Mandalapu, Rakesh Kumar Polasa, Shubham Paliwal, Satish Anand Verkila
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Publication number: 20220244309Abstract: The present disclosure provides a DFT architecture for ICs and a method for testing the ICs with the proposed DFT architecture. The present disclosure also includes a focus on USB PD protocol with respect to the DFT architecture. The present disclosure also includes focus on testing IC with single I/O pin. The DFT architecture primarily comprises of a test mode controller and reuses the USBPD protocol framework logic comprising analog USBPD CC circuitry in analog block and the USBPD signaling, protocol logic in digital block for the test purposes. The DFT architecture is implemented with analog test modes and digital test modes using a single I/O pin, wherein analog test modes comprises of analog trims and observation modes and digital test modes comprises of LBIST, ATPG and digital observation modes. The method disclosed is directed to the functions associated with testing the USBPD ICS using single I/O pin.Type: ApplicationFiled: October 6, 2021Publication date: August 4, 2022Inventors: Munnangi SIRISHA, Rakesh Kumar POLASA, Satish Anand VERKILA
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Publication number: 20220085911Abstract: The present disclosure provides a transceiver for transmission of data coded according to a Bi-phase Mark Coding (BMC) protocol through a configurable channel (CC) of a USB type-C port. The transceiver includes: a transmitter configured to receive the coded BMC data and transmit the coded BMC data through the CC line. The transmitter includes: a low dropout (LDO) regulator configured to receive a reference voltage (VREF) and generate a local programmable supply voltage; a delay control logic configured to receive the BMC data, and including flipflops connected in series, wherein, output from each flipflop is delayed with respect to input received by the flipflop; and a transmitter driver configured to receive output from each flipflop of the delay control logic, the transmitter driver including a NMOS switches and a PMOS switches. The transceiver includes an eye correction receiver configured to receive output from the transmitter driver of the transmitter.Type: ApplicationFiled: February 18, 2021Publication date: March 17, 2022Inventors: S V Kalyani MANDALAPU, Rakesh Kumar POLASA, Shubham PALIWAL, Satish Anand VERKILA
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Patent number: 11226664Abstract: Systems and methods for providing VCONN to configuration channel line in USB-interface, involving a sense switch and a VCONN switch coupled with the VCONN supply and a gate control unit; an over current protection (OCP) reference current unit configured to provide a predetermined current through the sense branch; a preamplifier configured to amplify a differential voltage between source terminal voltages of the sense switch and the VCONN switch; an Over Current detection comparator configured to generate an Over Current fault signal when the source terminal voltage at the VCONN switch is lower than the source terminal voltage at the sense switch; and a control unit configured to: activate, upon receipt of the generated Over Current fault signal, the gate control unit, wherein the gate control unit, upon activation, is configured to disable the sense switch and the VCONN switch respectively to protect the VCONN and CC_P from over current.Type: GrantFiled: June 22, 2020Date of Patent: January 18, 2022Assignee: SILICONCH SYSTEMS PVT LTDInventors: Ashok Kumar Jyani, Satish Anand Verkila, Shubham Paliwal
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Publication number: 20210320514Abstract: Systems and methods for detecting electrical connection and disconnection on an USB Type-A charging port like power adapters, power banks and car chargers having one or more USB Type-A charging port of an USB device. The system includes: a voltage source; a MOSFET SWITCH gate driver, in USB type-A connected state, that operatively couples MOSFET SWITCH with voltage source and VBUS supply of USB type-A port; charge pump; a current sense differential amplifier; and a control unit configured to: monitor VBUS current, and detect potential disconnected state of connected USB type-A port; and monitor VBUS voltage and compare VBUS voltage with predetermined voltage to sense external condition such that VBUS voltage drops because of load capacitance and load current. The control unit is further configured to, when the duty cycle has reached a minimum VBUS current, detect the USB type-A disconnection with a charge pump state.Type: ApplicationFiled: June 10, 2020Publication date: October 14, 2021Inventors: Rakesh Kumar POLASA, Satish Anand VERKILA, Burle Naga SATYANARAYANA
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Publication number: 20210303048Abstract: Systems and methods for providing VCONN to configuration channel line in USB-interface, involving a sense switch and a VCONN switch coupled with the VCONN supply and a gate control unit; an over current protection (OCP) reference current unit configured to provide a predetermined current through the sense branch; a preamplifier configured to amplify a differential voltage between source terminal voltages of the sense switch and the VCONN switch; an Over Current detection comparator configured to generate an Over Current fault signal when the source terminal voltage at the VCONN switch is lower than the source terminal voltage at the sense switch; and a control unit configured to: activate, upon receipt of the generated Over Current fault signal, the gate control unit, wherein the gate control unit, upon activation, is configured to disable the sense switch and the VCONN switch respectively to protect the VCONN and CC_P from over current.Type: ApplicationFiled: June 22, 2020Publication date: September 30, 2021Inventors: Ashok Kumar JYANI, Satish Anand VERKILA, Shubham PALIWAL
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Publication number: 20210303049Abstract: The present disclosure provides a system and method for soft start scheme to control inrush current for VCONN in USB-C interface. The system includes: a serial shift register having flip-flops and adapted to obtain clock with programmable clock divider, frequency of clock changes dynamically by programming programmable clock divider; a resistor DAC unit configured to increment voltage in step-wise manner; a pass gate switch comprising NMOS gate switch and a PMOS gate switch connected in parallel and operatively coupled to the resistor DAC unit and configured to control an input voltage to a VCONN charge pump, said input voltage being in incremental steps such that the VCONN charge pump pumps an output voltage; and a VCONN switch gate operatively coupled to the VCONN charge pump and configured to supply the output voltage in controlled, incremental steps, such that the output voltage is ramped slowly to control the inrush current.Type: ApplicationFiled: June 29, 2020Publication date: September 30, 2021Inventors: Ashok Kumar JYANI, Satish Anand VERKILA, Shubham PALIWAL, Rakesh Kumar POLASA
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Patent number: 11054446Abstract: The present disclosure provides a system and method including: a first USB port and one or more second USB ports provided on the multi-port adapter; an AC-DC conversion configured to measure a first load current at the first USB port; a plurality of buck-boost mode power conversion units, each configured to measure a second load current at a corresponding one or more second USB ports; and a system controller configured to measure the first load current and the one or more second load currents, wherein the system controller is configured to compare and adjust the measured first load current and the measured one or more second load currents to, respectively, a first rated current and a corresponding second rated current for each of the one or more second USB ports.Type: GrantFiled: July 14, 2020Date of Patent: July 6, 2021Assignee: SILICONCH SYSTEMS PVT LTDInventors: Burle Naga Satyanarayana, Rakesh Kumar Polasa, Shubham Paliwal, Satish Anand Verkila
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Patent number: 10171270Abstract: Various embodiments provide for correcting pre-cursor intersymbol interference (ISI) and post-cursor ISI in a data signal received over a channel. More particularly, some embodiments correct pre-cursor ISI and post-cursor ISI using decision feedback equalization (DFE).Type: GrantFiled: December 20, 2017Date of Patent: January 1, 2019Assignee: Cadence Design Systems, Inc.Inventors: Satish Anand Verkila, Vineeth Anavangot, Anil Kumar Ankam