Abstract: A communication device may include a processor configured to establish a connection with one or more peripheral devices in response to a disconnection from an external communication device, determine that the external communication device is connectable based on radio communication signals received from the external communication device, and encode a message to be transmitted to the one or more peripheral devices in response to the determination that the external communication device is connectable, wherein the message is configured to cause the one or more peripheral devices to perform a high duty cycle advertising in accordance with a Bluetooth communication protocol.

Abstract: A wireless station may include one or more processors. The wireless station may receive a no wireless fidelity (WiFi) signal indicating a parameter. The wireless station may also provide a scan signal comprising a scan list indicating a WiFi frequency band that a cellular modem is to scan for a WiFi signal based on the parameter. In addition, the wireless station may provide a mode signal based on the no WiFi signal. The mode signal may indicate that a WiFi modem is to enter a low power mode. Further, the wireless station may receive a detect signal indicating that the cellular modem detected the WiFi signal within the WiFi frequency band. The wireless station may provide a wake-up signal configured to cause the WiFi modem to enter an operational mode, the wake-up signal indicating a frequency of the detected WiFi signal.

Abstract: In one embodiment, a timer apparatus is configured to time a duration in which interrupts are disabled on a processor. The apparatus includes an input to receive a start signal indicating that an interrupt on a processor is disabled, a counter to determine the duration in which interrupts are disabled, and an output to signal a timer event based on the counter. The processor may be configured to trigger a hardware exception in response to the timer event signal. When the interrupts are re-enabled on the processor, the counter of the apparatus may be disabled.

Abstract: In one embodiment, a timer apparatus is configured to time a duration in which interrupts are disabled on a processor. The apparatus includes an input to receive a start signal indicating that an interrupt on a processor is disabled, a counter to determine the duration in which interrupts are disabled, and an output to signal a timer event based on the counter. The processor may be configured to trigger a hardware exception in response to the timer event signal. When the interrupts are re-enabled on the processor, the counter of the apparatus may be disabled.