Abstract: An information record/reproduction apparatus includes logical volumes that can be used as a variable-length record/reproduction area and a physical volume that has been divided into a plurality of fixed-length areas and is not subjected to record or reproduction. Allocation to the logical volume is made by combining the divided fixed-length physical volumes by a management unit, and the size of the information storage area can be set depending upon, for example, a category of information to be recorded. If the amount of information of high priority exceeds a size of a predetermined logical volume corresponding to the information while no unused physical volume is available, then the management unit detaches part of a logical volume in which information of low priority has been recorded, allocates the detached part to the logical volume corresponding to the information, and thus records the exceeding amount of information.

Abstract: This automatic gain control circuit is provided with a variable gain amplifier for amplifying a received signal, has a small circuit size, and makes it possible to reduce the effect of superimposed external noise input within the frequency bandwidth of a received signal. The automatic gain control circuit supplies the output of the variable gain amplifier to an analog/digital converter and comprises: a frequency selection circuit that is connected to the output of the analog/digital converter and that selects a signal within the frequency bandwidth of a received signal, said signal having a narrower bandwidth than the frequency bandwidth; and a control signal generation circuit that generates a control signal for the variable gain amplifier on the basis of the strength of the signal selected by the frequency selection circuit.

Abstract: This automatic gain control circuit is provided with a variable gain amplifier for amplifying a received signal, has a small circuit size, and makes it possible to reduce the effect of superimposed external noise input within the frequency bandwidth of a received signal. The automatic gain control circuit supplies the output of the variable gain amplifier to an analog/digital converter and comprises: a frequency selection circuit that is connected to the output of the analog/digital converter and that selects a signal within the frequency bandwidth of a received signal, said signal having a narrower bandwidth than the frequency bandwidth; and a control signal generation circuit that generates a control signal for the variable gain amplifier on the basis of the strength of the signal selected by the frequency selection circuit.

Abstract: An information record/reproduction apparatus includes logical volumes that can be used as a variable-length record/reproduction area and a physical volume that has been divided into a plurality of fixed-length areas and is not subjected to record or reproduction. Allocation to the logical volume is made by combining the divided fixed-length physical volumes by a management unit, and the size of the information storage area can be set depending upon, for example, a category of information to be recorded. If the amount of information of high priority exceeds a size of a predetermined logical volume corresponding to the information while no unused physical volume is available, then the management unit detaches part of a logical volume in which information of low priority has been recorded, allocates the detached part to the logical volume corresponding to the information, and thus records the exceeding amount of information.

Abstract: According to one embodiment, a semiconductor integrated circuit includes a semiconductor integrated circuit a voltage regulator providing a prescribed power-supply voltage, a plurality of delay test circuits, each of the delay test circuits being configured in each of areas where electrical current flows in response to each of operation modes, a test control unit executing a delay test using the delay test circuit under a test mode while decreasing a power-supply voltage in a stepwise fashion, a supply voltage decision unit deciding the power-supply voltage of the operation mode on a basis of the delay test, a memory unit storing the power-supply voltage of each operation mode, a supply voltage configuration unit reading out the power-supply voltage corresponding to the operation mode from the memory unit, and the supply configuration unit arranging the power-supply voltage as an output voltage of the voltage regulator when each of the operation modes starts to execute.

Abstract: According to one embodiment, a semiconductor integrated circuit includes a semiconductor integrated circuit a voltage regulator providing a prescribed power-supply voltage, a plurality of delay test circuits, each of the delay test circuits being configured in each of areas where electrical current flows in response to each of operation modes, a test control unit executing a delay test using the delay test circuit under a test mode while decreasing a power-supply voltage in a stepwise fashion, a supply voltage decision unit deciding the power-supply voltage of the operation mode on a basis of the delay test, a memory unit storing the power-supply voltage of each operation mode, a supply voltage configuration unit reading out the power-supply voltage corresponding to the operation mode from the memory unit, and the supply configuration unit arranging the power-supply voltage as an output voltage of the voltage regulator when each of the operation modes starts to execute.

Abstract: In a multi-chip package having vertically stacked semiconductor integrated circuits (chips), a heat transmitting conductive plate (5) can be interposed between a lower layer semiconductor chip (3) and an upper layer semiconductor chip (4) and connected to a ground wiring of a substrate (2) through a bonding wire (9). A heating transmitting conductive plate (5) at the ground potential can block propagation of noise between the lower layer semiconductor chip (3) and upper layer semiconductor chip (4). Thus, the addition of noise to signals of an analog circuit in the upper layer semiconductor chip (4) can be avoided, reducing noise induced malfunctions. Furthermore, heat generated by the lower layer semiconductor chip (3) and upper layer semiconductor chip (4) can be transmitted through contact points with the heat transmitting conductive plate (5) for dissipation therefrom. This can improve heat dissipating capabilities of the semiconductor device (1) contributing to more stable operation.

Abstract: In a multi-chip package having vertically stacked semiconductor integrated circuits (chips), a heat transmitting conductive plate (5) can be interposed between a lower layer semiconductor chip (3) and an upper layer semiconductor chip (4) and connected to a ground wiring of a substrate (2) through a bonding wire (9). A heating transmitting conductive plate (5) at the ground potential can block propagation of noise between the lower layer semiconductor chip (3) and upper layer semiconductor chip (4). Thus, the addition of noise to signals of an analog circuit in the upper layer semiconductor chip (4) can be avoided, reducing noise induced malfunctions. Furthermore, heat generated by the lower layer semiconductor chip (3) and upper layer semiconductor chip (4) can be transmitted through contact points with the heat transmitting conductive plate (5) for dissipation therefrom. This can improve heat dissipating capabilities of the semiconductor device (1) contributing to more stable operation.