Patents by Inventor Satomi Nakamura

Satomi Nakamura has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250072273
    Abstract: An organic EL device includes an emitting region and a first anode side organic layer. The first anode side organic layer contains a first material. The emitting region includes a first emitting layer containing first and second host materials and a second emitting layer containing a third host material.
    Type: Application
    Filed: December 19, 2022
    Publication date: February 27, 2025
    Applicant: IDEMITSU KOSAN CO.,LTD.
    Inventors: Satomi TASAKI, Hiroaki TOYOSHIMA, Tetsuya MASUDA, Masato NAKAMURA, Hiroaki ITOI
  • Patent number: 9741511
    Abstract: A technology for making the heat load on an electronic component attached to a target object smaller than before is provided. The electronic component includes a main body, the main body including an electronic component unit adapted to generate an electrical signal and click feeling in accordance with rotation of an engaged portion, a shaft support having a cylindrical portion to be inserted into a through-hole formed in the target object, and a retaining member; and a control shaft made of metal and capable of rotating the engaged portion, the control shaft being inserted into the cylindrical portion after a reflow soldering process of the target object is completed, and being engaged with the engaged portion. The control shaft inserted into the cylindrical portion is retained by the retaining member.
    Type: Grant
    Filed: June 7, 2013
    Date of Patent: August 22, 2017
    Assignee: TOKYO COSMOS ELECTRIC CO., LTD.
    Inventors: Hajime Fukushima, Satomi Nakamura
  • Publication number: 20160020044
    Abstract: A technology for making the heat load on an electronic component attached to a target object smaller than before is provided. The electronic component includes a main body, the main body including an electronic component unit adapted to generate an electrical signal and click feeling in accordance with rotation of an engaged portion, a shaft support having a cylindrical portion to be inserted into a through-hole formed in the target object, and a retaining member; and a control shaft made of metal and capable of rotating the engaged portion, the control shaft being inserted into the cylindrical portion after a reflow soldering process of the target object is completed, and being engaged with the engaged portion. The control shaft inserted into the cylindrical portion is retained by the retaining member.
    Type: Application
    Filed: June 7, 2013
    Publication date: January 21, 2016
    Applicant: TOKYO COSMOS ELECTRIC CO., LTD.
    Inventors: Hajime FUKUSHIMA, Satomi NAKAMURA
  • Patent number: 8438527
    Abstract: According to one embodiment, an original plate evaluation method is disclosed. The original plate includes a substrate and N patterns differing from one another in shape. The method includes selecting N1 patterns from the N patterns based on first criterion, obtaining measured values for the N1 patterns, performing a decision whether the obtained measured values satisfy first specification value, selecting N2 patterns from the N patterns based on second criterion, predicting shapes of transfer patterns corresponding to N2 patterns, performing a decision whether the predicted shapes satisfy second specification value, and evaluating the plate based on the decision.
    Type: Grant
    Filed: March 22, 2012
    Date of Patent: May 7, 2013
    Assignee: Kabushiki Kaisha Toshiba
    Inventors: Satomi Nakamura, Toshiya Kotani, Kazuhito Kobayashi, Akiko Mimotogi, Chikaaki Kodama
  • Publication number: 20130055172
    Abstract: According to one embodiment, an original plate evaluation method is disclosed. The original plate includes a substrate and N patterns differing from one another in shape. The method includes selecting N1 patterns from the N patterns based on first criterion, obtaining measured values for the N1 patterns, performing a decision whether the obtained measured values satisfy first specification value, selecting N2 patterns from the N patterns based on second criterion, predicting shapes of transfer patterns corresponding to N2 patterns, performing a decision whether the predicted shapes satisfy second specification value, and evaluating the plate based on the decision.
    Type: Application
    Filed: March 22, 2012
    Publication date: February 28, 2013
    Inventors: Satomi Nakamura, Toshiya Kotani, Kazuhito Kobayashi, Akiko Mimotogi, Chikaaki Kodama
  • Patent number: 7799510
    Abstract: A method for correcting a mask pattern to be formed on a photomask used in a lithographic step of a semiconductor device fabrication process. The method includes the steps of extracting an isolated pattern having an optically isolated portion from the mask pattern and providing, in an adjacent pattern extending parallel to the isolated portion of the isolated pattern and having a terminal end, an extended portion extending from the terminal end next to the isolated portion of the isolated pattern along a direction in which the isolated portion of the isolated pattern extends.
    Type: Grant
    Filed: October 21, 2009
    Date of Patent: September 21, 2010
    Assignee: Sony Corporation
    Inventors: Kazuhisa Ogawa, Satomi Nakamura, Kazuyoshi Kawahara
  • Patent number: 7767364
    Abstract: A method is provided for correcting a mask pattern to be formed on a photomask used in a lithographic step of a semiconductor device fabrication process. The method includes the steps of extracting an isolated pattern having an optically isolated portion from the mask pattern and providing, in an adjacent pattern extending parallel to the isolated portion of the isolated pattern and having a terminal end, an extended portion extending from the terminal end next to the isolated portion of the isolated pattern along a direction in which the isolated portion of the isolated pattern extends.
    Type: Grant
    Filed: November 28, 2005
    Date of Patent: August 3, 2010
    Assignee: Sony Corporation
    Inventors: Kazuhisa Ogawa, Satomi Nakamura, Kazuyoshi Kawahara
  • Publication number: 20100038798
    Abstract: A method for correcting a mask pattern to be formed on a photomask used in a lithographic step of a semiconductor device fabrication process. The method includes the steps of extracting an isolated pattern having an optically isolated portion from the mask pattern and providing, in an adjacent pattern extending parallel to the isolated portion of the isolated pattern and having a terminal end, an extended portion extending from the terminal end next to the isolated portion of the isolated pattern along a direction in which the isolated portion of the isolated pattern extends.
    Type: Application
    Filed: October 21, 2009
    Publication date: February 18, 2010
    Applicant: Sony Corporation
    Inventors: Kazuhisa Ogawa, Satomi Nakamura, Kazuyoshi Kawahara
  • Patent number: 7541117
    Abstract: Disclosed herein is a mask pattern generating method for generating a mask pattern to be formed in a Levenson phase shift mask used in a light exposure process for exposing a photoresist film formed on a fabricated film to be patterned into a conductive layer to light when the conductive layer is patterned by photolithography, the conductive layer including a gate electrode formed in an active region extending in a first direction in a wafer in such a manner as to extend in a second direction orthogonal to the first direction, the mask pattern generating method including: a phase shifter arranging step; a shifter pattern image obtaining step; a trim pattern image obtaining step; and a phase shifter elongating step.
    Type: Grant
    Filed: April 16, 2007
    Date of Patent: June 2, 2009
    Assignee: Sony Corporation
    Inventors: Kazuhisa Ogawa, Satomi Nakamura, Kohichi Nakayama
  • Publication number: 20070283313
    Abstract: Disclosed herein is a mask pattern generating method for generating a mask pattern to be formed in a Levenson phase shift mask used in a light exposure process for exposing a photoresist film formed on a fabricated film to be patterned into a conductive layer to light when the conductive layer is patterned by photolithography, the conductive layer including a gate electrode formed in an active region extending in a first direction in a wafer in such a manner as to extend in a second direction orthogonal to the first direction, the mask pattern generating method including: a phase shifter arranging step; a shifter pattern image obtaining step; a trim pattern image obtaining step; and a phase shifter elongating step.
    Type: Application
    Filed: April 16, 2007
    Publication date: December 6, 2007
    Applicant: SONY CORPORATION
    Inventors: Kazuhisa Ogawa, Satomi Nakamura, Kohichi Nakayama
  • Publication number: 20060134532
    Abstract: A method is provided for correcting a mask pattern to be formed on a photomask used in a lithographic step of a semiconductor device fabrication process. The method includes the steps of extracting an isolated pattern having an optically isolated portion from the mask pattern and providing, in an adjacent pattern extending parallel to the isolated portion of the isolated pattern and having a terminal end, an extended portion extending from the terminal end next to the isolated portion of the isolated pattern along a direction in which the isolated portion of the isolated pattern extends.
    Type: Application
    Filed: November 28, 2005
    Publication date: June 22, 2006
    Inventors: Kazuhisa Ogawa, Satomi Nakamura, Kazuyoshi Kawahara
  • Patent number: D480177
    Type: Grant
    Filed: May 25, 2001
    Date of Patent: September 30, 2003
    Assignee: The Procter & Gamble Company
    Inventors: Makoto Isono, Hideto Maeda, Satomi Nakamura, Tadayasu Koga, Christopher David Leahy, Kentaro Yamamoto, Kazuya Iwata
  • Patent number: D665752
    Type: Grant
    Filed: March 2, 2012
    Date of Patent: August 21, 2012
    Assignee: Tokyo Cosmos Electric Co., Ltd.
    Inventors: Hajime Fukushima, Satomi Nakamura