Patents by Inventor Satoru EJIMA

Satoru EJIMA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10341153
    Abstract: A peak power reduction device includes a unit for dividing digital information to be transmitted into a plurality of streams; a unit for selecting the modulation level of the streams and distribution of transmission power according to a transmission state; a unit for performing singular-value decomposition on the transmission path characteristic of a streams and precoding the resultant data by a right singular value matrix; a unit for performing complex mapping on the subcarrier of a stream according to the modulation level; a unit for converting a complex mapping signal into a time domain signal; a first unit for storing a conversion result as a time domain signal; a second unit for calculating a peak time signal exceeding a predetermined threshold value from a peak value, if any exists, that exceeds a prescribed threshold value for the amplitude of the time domain signal.
    Type: Grant
    Filed: June 7, 2016
    Date of Patent: July 2, 2019
    Assignee: HITACHI KOKUSAI ELECTRIC INC.
    Inventors: Tatsuhiro Nakada, Hiroki Kato, Kei Ito, Satoru Ejima
  • Publication number: 20190089565
    Abstract: A peak power reduction device includes a unit for dividing digital information to be transmitted into a plurality of streams; a unit for selecting the modulation level of the streams and distribution of transmission power according to a transmission state; a unit for performing singular-value decomposition on the transmission path characteristic of a streams and precoding the resultant data by a right singular value matrix; a unit for performing complex mapping on the subcarrier of a stream according to the modulation level; a unit for converting a complex mapping signal into a time domain signal; a first unit for storing a conversion result as a time domain signal; a second unit for calculating a peak time signal exceeding a predetermined threshold value from a peak value, if any exists, that exceeds a prescribed threshold value for the amplitude of the time domain signal.
    Type: Application
    Filed: June 7, 2016
    Publication date: March 21, 2019
    Applicant: HITACHI KOKUSAI ELECTRIC INC.
    Inventors: Tatsuhiro NAKADA, Hiroki KATO, Kei ITO, Satoru EJIMA
  • Patent number: 8958505
    Abstract: The present invention is directed to reduction of operation amount of likelihood calculation (LLR calculation) in a communication apparatus for performing communications using an extended mapping in which a plurality of bit sequences are assigned to a single symbol point. A receiving unit receives a signal which is transmitted from a transmitting unit by using the extended mapping. A repetition process unit decodes the received signal from the receiving unit by calculating an LLR of the received signal and performing a repetition process. In this case, the LLR is calculated for every bit using a MAX-LOG approximation and a thus-derived approximation formula is multiplied by weighting factors corresponding to proportions of “0” and “1” in each bit assigned to a symbol point closest to the received signal.
    Type: Grant
    Filed: July 26, 2013
    Date of Patent: February 17, 2015
    Assignee: Hitachi Kokusai Electric Inc.
    Inventors: Satoru Ejima, Takehiko Kobayashi, Keat Beng Toh
  • Patent number: 8792595
    Abstract: A wireless communications device and method carries out a process including estimating channel information based on a received signal; generating pseudo-transmission signal point candidates based on the channel information and/or transmission signal point candidates; and generating a replica of the received signal based on the pseudo-transmission signal point candidates and the estimated channel information. The process further includes performing matrix operations on the basis of the received signal and the replica thereof; selecting pseudo-transmission signal point candidates which have a greater effect on likelihood calculations; reverting the selected pseudo-transmission signal point candidates to original transmission signal point candidates and calculating final likelihoods; and restoring the received signal on the basis of the calculated likelihoods.
    Type: Grant
    Filed: December 28, 2012
    Date of Patent: July 29, 2014
    Assignee: Hitachi Kokusai Electric Inc.
    Inventors: Keisuke Yamamoto, Takehiko Kobayashi, Satoru Ejima
  • Publication number: 20130315352
    Abstract: The present invention is directed to reduction of operation amount of likelihood calculation (LLR calculation) in a communication apparatus for performing communications using an extended mapping in which a plurality of bit sequences are assigned to a single symbol point. A receiving unit receives a signal which is transmitted from a transmitting unit by using the extended mapping. A repetition process unit decodes the received signal from the receiving unit by calculating an LLR of the received signal and performing a repetition process. In this case, the LLR is calculated for every bit using a MAX?LOG approximation and a thus-derived approximation formula is multiplied by weighting factors corresponding to proportions of “0” and “1” in each bit assigned to a symbol point closest to the received signal.
    Type: Application
    Filed: July 26, 2013
    Publication date: November 28, 2013
    Applicant: Hitachi Kokusai Electric Inc.
    Inventors: Satoru EJIMA, Takehiko KOBAYASHI, Keat Beng TOH