Patents by Inventor Satoru Ikeya

Satoru Ikeya has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11929651
    Abstract: An inverter integrated gas supply device includes a fluid machine configured to discharge air, an electric motor having a motor casing and configured to drive the fluid machine, an inverter having an inverter casing and configured to supply a drive current to the electric motor, a motor-side connection part attached to the motor casing and configured to receive the drive current, and an inverter-side connection part attached to the inverter casing, connected to the motor-side connection part. The motor-side connection part includes a motor-side connector housing, and a motor connector. The inverter-side connection part includes an inverter-side connector housing, and an inverter connector. A position of the motor connector relative to the motor-side connector housing is fixed; and a position of the inverter connector relative to the inverter-side connector housing is variable.
    Type: Grant
    Filed: September 22, 2021
    Date of Patent: March 12, 2024
    Inventors: Nobuyuki Ikeya, Yuji Sasaki, Masaya Taniguchi, Gen Kuwata, Satoru Ohashi
  • Publication number: 20070198318
    Abstract: The present invention provides an information processing apparatus. In the apparatus, the shortest repair days information is determined by comparing days presented by the first transportation days information with a sum of days presented by the second transportation days information and the third transportation days information so as to acquire the shorter days, and calculating a sum of the shorter days and days presented by the repair days information. The lowest repair charge information is determined by comparing a charge presented by the first transportation charge information with a sum of charges presented by the second transportation charge information and the third transportation charge information so as to acquire the lower charge, and calculating a sum of the lower charge and a charge presented by the repair charge information.
    Type: Application
    Filed: January 25, 2007
    Publication date: August 23, 2007
    Inventor: Satoru Ikeya
  • Patent number: 6583555
    Abstract: A flat fluorescent lamp has a vessel or housing including first and second substrates opposed to each other at a small distance, and having discharge gas enclosed therein. A first planar electrode layer being transparent is disposed on an inner surface of the first substrate. A second planar electrode layer is disposed on an inner surface of the second substrate, for electrical discharge in cooperation with the first planar electrode layer. First and second dielectric layers are disposed on respectively the inner surfaces of the first and second substrates to cover the first and second planar electrode layers. First and second fluorescent layers are overlaid on respectively inner surfaces of the first and second dielectric layers, for emitting electromagnetic rays upon the electrical discharge between the first and second planar electrode layers. A pattern of plural projections is formed with the inner surface of the second dielectric layer.
    Type: Grant
    Filed: August 22, 2001
    Date of Patent: June 24, 2003
    Assignee: Fuji Photo Film Co., Ltd.
    Inventors: Hiroyuki Matsukawa, Nobuo Katsuma, Yoshihiro Yamaguchi, Hiroshi Fukuda, Satoru Ikeya, Akihiko Machida
  • Publication number: 20020024294
    Abstract: A flat fluorescent lamp has a vessel or housing including first and second substrates opposed to each other at a small distance, and having discharge gas enclosed therein. A first planar electrode layer being transparent is disposed on an inner surface of the first substrate. A second planar electrode layer is disposed on an inner surface of the second substrate, for electrical discharge in cooperation with the first planar electrode layer. First and second dielectric layers are disposed on respectively the inner surfaces of the first and second substrates to cover the first and second planar electrode layers. First and second fluorescent layers are overlaid on respectively inner surfaces of the first and second dielectric layers, for emitting electromagnetic rays upon the electrical discharge between the first and second planar electrode layers. A pattern of plural projections is formed with the inner surface of the second dielectric layer.
    Type: Application
    Filed: August 22, 2001
    Publication date: February 28, 2002
    Applicant: FUJI PHOTO FILM CO., LTD.
    Inventors: Hiroyuki Matsukawa, Nobuo Katsuma, Yoshihiro Yamaguchi, Hiroshi Fukuda, Satoru Ikeya, Akihiko Machida