Patents by Inventor Satoru Karaki

Satoru Karaki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190156133
    Abstract: Visual line information unique to a driver is detected from a captured image of the driver, whose visual line is guided to a predetermined position, before starting driving, and visual line information of the driver detected during driving is calibrated by using the detected visual line information unique to the driver as a calibration value.
    Type: Application
    Filed: September 29, 2018
    Publication date: May 23, 2019
    Inventors: SATORU KARAKI, SAKAE SAITO
  • Patent number: 6747897
    Abstract: A charge pump circuit includes inverters INV1 and INV2. The inverter INV1 receives a clock signal CLK2, and applies a voltage waveform at an immediately previous node to a second end of a capacitor connected to a transistor and to the p-well thereof. The voltage of the capacitor on the side of the control terminal of the transistor, and the voltage waveform at the node, are raised with the same phase timing as the clock signal CLK1. The inverter INV2 receives a clock signal CLK1, and applies a voltage waveform at an immediately previous node to a second end of another capacitor connected to another transistor and to the p-well thereof. The voltage of the another capacitor on the side of the control terminal of the another transistor, and the voltage waveform at the node, are raised with the same phase timing as the clock signal CLK2.
    Type: Grant
    Filed: July 29, 2002
    Date of Patent: June 8, 2004
    Assignee: Sharp Kabushiki Kaisha
    Inventor: Satoru Karaki
  • Publication number: 20030057469
    Abstract: A charge pump circuit includes inverters INV1 and INV2. The inverter INV1 receives a clock signal CLK2, and applies a voltage waveform at an immediately previous node to a second end of a capacitor connected to a transistor and to the p-well thereof. The voltage of the capacitor on the side of the control terminal of the transistor, and the voltage waveform at the node, are raised with the same phase timing as the clock signal CLK1. The inverter INV2 receives a clock signal CLK1, and applies a voltage waveform at an immediately previous node to a second end of another capacitor connected to another transistor and to the p-well thereof. The voltage of the another capacitor on the side of the control terminal of the another transistor, and the voltage waveform at the node, are raised with the same phase timing as the clock signal CLK2.
    Type: Application
    Filed: July 29, 2002
    Publication date: March 27, 2003
    Inventor: Satoru Karaki