Abstract: A semiconductor device 1 is equipped with a first substrate 3 on which a first semiconductor chip 2 is mounted, a second substrate 5 on which a second semiconductor chip 4 is mounted, and connecting sections 6 that electrically connect the first substrate 3 and the second substrate 5. The first substrate 3 has build-up layers 31A and 31B in each of which an insulating layer 311 containing a resin and conductor interconnect layers 312 and 313 are laminated alternately, and the respective conductor interconnect layers 312 are connected by a conductive layer 314 provided in via holes of the insulating layers 311. The second substrate 5 also has build-up layers 31A and 31B.

Abstract: In one embodiment, a dielectric material layer embedding metal structures is ablated from the chip-containing substrate by laser grooving, which is performed on dicing channels of the chip-containing substrate. Subsequently, an underfill layer is formed over the dielectric material layer in a pattern that excludes the peripheral areas of the chip-containing substrate. The physically exposed dicing channels at the periphery can be employed to align a blade to dice the chip-containing substrate. In another embodiment, an underfill layer is formed prior to any laser grooving. Mechanical cutting of the underfill layer from above dicing channels is followed by laser ablation of the dicing channels and subsequent mechanical cutting to dice a chip-containing substrate.

Abstract: The problem of the present invention is to provide a chip-on-chip type semiconductor electronic component and a semiconductor device which can meet the requirements for further density increase of semiconductor integrated circuits. The present invention provides: a chip-on-chip type semiconductor electronic component in which a circuit surface of a first semiconductor chip and a circuit surface of a second semiconductor chip are opposed to each other, wherein the distance X between the first semiconductor chip and the second semiconductor chip is 50 ?m or less, and the shortest distance Y between the side surface of the second semiconductor chip and the first external electrode is 1 mm or less; and a semiconductor device comprising the same.

Abstract: Provided is a method for manufacturing an electronic component by using a solder joining method for bonding a first electronic component having a metal electrode with a second electronic component having a solder electrode, the method comprising; (i) forming a resin layer containing a thermosetting resin on at least one of the solder joint surfaces of said first electronic component and said second electronic component; (ii) positioning said metal electrode of said first electronic component and said solder electrode of said second electronic component to face each other, heating said positioned electrodes and applying pressure, and thereby bringing said metal electrode and said solder electrode into contact; (iii) heating electronic components while applying pressure thereby fusion bonding said solder to said metal electrode; and (iv) heating said resin layer.

Abstract: The present invention provides an adhesive tape comprising a flux-active compound having a carboxyl group and/or a phenolic hydroxyl group, a thermosetting resin and a film-forming resin. In the adhesive tape of the present invention, the thermosetting resin may be an epoxy resin and may contain a curing agent. The curing agent may be an imidazole compound and/or a phosphorous compound. The adhesive tape of the present invention can be used as an interlayer material for a circuit board and a multilayered flexible printed circuit board.

Abstract: Provided is a method for manufacturing an electronic component by using a solder joining method for bonding a first electronic component having a metal electrode with a second electronic component having a solder electrode, the method comprising; (i) forming a resin layer containing a thermosetting resin on at least one of the solder joint surfaces of said first electronic component and said second electronic component; (ii) positioning said metal electrode of said first electronic component and said solder electrode of said second electronic component to face each other, heating said positioned electrodes and applying pressure, and thereby bringing said metal electrode and said solder electrode into contact; (iii) heating electronic components while applying pressure thereby fusion bonding said solder to said metal electrode; and (iv) heating said resin layer.

Abstract: In one embodiment, a dielectric material layer embedding metal structures is ablated from the chip-containing substrate by laser grooving, which is performed on dicing channels of the chip-containing substrate. Subsequently, an underfill layer is formed over the dielectric material layer in a pattern that excludes the peripheral areas of the chip-containing substrate. The physically exposed dicing channels at the periphery can be employed to align a blade to dice the chip-containing substrate. In another embodiment, an underfill layer is formed prior to any laser grooving. Mechanical cutting of the underfill layer from above dicing channels is followed by laser ablation of the dicing channels and subsequent mechanical cutting to dice a chip-containing substrate.

Abstract: The present invention relates to an adhesive tape for electrically connecting semiconductor chips in a chip-on-chip type semiconductor device. The adhesive tape comprising: (A) 10 to 50 wt % of film forming resin; (B) 30 to 80 wt % of curable resin; and (C) 1 to 20 wt % of curing agent having flux activity.

Abstract: Disclosed is an adhesive film in which the adhesive film contains a thermosetting resin (A), a curing agent (B), a compound having flux activity (C) and a film forming resin (D), the minimum melt viscosity of the adhesive film is 0.01 to 10,000 Pa·s, and the adhesive film satisfies the following formula (1) when the exothermic peak temperature of the adhesive film is defined as (a) and the 5% weight loss temperature by thermogravimetry of the adhesive film is defined as (b), (b)?(a)?100 degrees centigrade??(1).

Abstract: An encapsulation resin composition for preapplication, comprising (a) an epoxy resin, and (b) a curing agent having flux activity, wherein the tack after B-staging is at least 0 gf/5 mm? and at most 5 gf/5 mm?, and the melt viscosity at 130° C. is at least 0.01 Pa·s and at most 1.0 Pa·s; a preapplied encapsulated component and semiconductor device using the composition, and a process of fabrication thereof. The resin composition is less susceptible to air entrapment during provisional placement of semiconductor chips, and excels in workability and reliability.

Abstract: Provided is a method for manufacturing an electronic component by using a solder joining method for bonding a first electronic component having a metal electrode with a second electronic component having a solder electrode, the method comprising; (i) forming a resin layer containing a thermosetting resin on at least one of the solder joint surfaces of said first electronic component and said second electronic component; (ii) positioning said metal electrode of said first electronic component and said solder electrode of said second electronic component to face each other, heating said positioned electrodes and applying pressure, and thereby bringing said metal electrode and said solder electrode into contact; (iii) heating electronic components while applying pressure thereby fusion bonding said solder to said metal electrode; and (iv) heating said resin layer.

Abstract: The present invention provides a conductive connecting material for electrically connecting terminals of electronic members, which has a layered structure comprising: a curable resin composition containing a resin component and a compound having a flux function; and a metal foil selected from a solder foil and a tin foil. Further, the present invention provides a method for connecting terminals comprising: a placement step in which the conductive connecting material is placed between opposed terminals; a heating step in which the conductive connecting material is heated at a temperature, which is equal to or higher than the melting point of the metal foil, and at which the resin composition is not completely cured or the resin composition is softened; and a curing step/solidifying step in which the resin composition is cured or solidified.

Abstract: A flexible substrate 10 of the present invention is the flexible substrate comprising a first resin film 1 having flux activity and a second resin film 2 different from the first resin film 1 laminated to said first resin film. The flexible substrate 10 is characterized in that the flexible substrate 10 is used by having a plurality of electronic components mounted on the surface of the first resin film 1, and thereafter having the respective electronic components and the flexible substrate 10 bonded at one time. The gel time of the first resin film 1 at 230° C. is 100 seconds or more and 600 seconds or less.

Abstract: In a method for bonding semiconductor wafers of the present invention, a bonding layer containing a flux-active curing agent and a thermosetting resin is interposed between a first semiconductor wafer and a second semiconductor wafer, thereby producing a semiconductor wafer stacked body in which the first and second semiconductor wafers are stacked together, and then the semiconductor wafer stacked body is compressed in a thickness direction thereof while heating it so that the first and second semiconductor wafers are fixed together by melting and solidifying solder bumps while curing the thermosetting resin, thereby producing a semiconductor wafer bonded body in which first connector portions and second connector portions are electrically connected together through solidified products obtained by melting and solidifying the solder bumps.

Abstract: To prevent formation of entrapped underfill material between solder balls and bonding bumps, fast temperature ramping is employed during a chi assembly after application of an underfill material prior to bonding. Voids formed within the underfill material are subsequently removed by curing the underfill material in a pressurized environment. Temperature cycling on the underfill material is limited during the bonding process in order to maintain viscosity of the underfill material prior to the cure process in the pressurized environment. Further, the underfill material is subjected to the pressurized environment until the cure process is complete to prevent re-formation of voids. The cure process can be a constant temperature or a multi-temperature process including temperature ramping. Further, the cure process can be a constant pressure process or a pressure cycling process that accelerates removal of the voids.

Abstract: A method of manufacturing a semiconductor device of the present invention includes a coating process in which a pasty thermosetting resin composition having a flux activity is coated on at least either one of a substrate and a semiconductor chip; a bonding process in which the substrate and the semiconductor chip are electrically bonded while placing the pasty thermosetting resin composition in between; a curing process in which the pasty thermosetting resin composition is cured under heating; and a cooling process, succeeding to the curing process, in which cooling is performed at a cooling rate between 10[° C./hour] or above and 50[° C./hour] or below.

Abstract: An adhesive tape 101 electrically connecting conductive components includes a resin layer 132 containing a thermosetting resin, a solder powder 103 and a curing agent. The solder powder 103 and the curing agent reside in the resin layer 132, the curing temperature T1 of the resin layer 132 and the melting point T2 of the solder powder 103 satisfy T1?T2+20° C., wherein the resin layer 132 shows a melt viscosity of 50 Pa·s or above and 5000 Pa·s or below, at the melting point T2 of the solder powder 103.

Abstract: A semiconductor device (100) comprises a first resin substrate (101) on which a first semiconductor chip (125) is mounted a surface thereof; a second resin substrate (111) on which a second semiconductor chip (131) is mounted on a surface thereof; and a resin base material (109), joined to a front surface of the first resin substrate (101) and to a back surface of the second resin substrate (111), so that these surfaces are electrically connected. The resin base material (109) is disposed in a circumference of the first resin substrate (101) in the surface of the first resin substrate (101). Further, the first semiconductor chip (125) is disposed in a space section provided among the first resin substrate (101), the second resin substrate (111) and the resin base material (109) in the surface of the first resin substrate (101).

Abstract: Disclosed is an adhesive tape containing a flux activation compound having a carboxyl group and/or a phenolic hydroxyl group, a thermosetting resin and a film-forming resin. In this adhesive tape, the thermosetting resin may be an epoxy resin, and may contain a curing agent. The curing agent may be an imidazole compound and/or a phosphorus compound. This adhesive tape can be used as an interlayer material for circuit boards or multilayer flexible printed wiring boards.

Abstract: A semiconductor device 1 is equipped with a first substrate 3 on which a first semiconductor chip 2 is mounted, a second substrate 5 on which a second semiconductor chip 4 is mounted, and connecting sections 6 that electrically connect the first substrate 3 and the second substrate 5. The first substrate 3 has build-up layers 31A and 31B in each of which an insulating layer 311 containing a resin and conductor interconnect layers 312 and 313 are laminated alternately, and the respective conductor interconnect layers 312 are connected by a conductive layer 314 provided in via holes of the insulating layers 311. The second substrate 5 also has build-up layers 31A and 31B.