Abstract: To provide a technique capable of improving performance and reliability of a semiconductor device. An n?-type epitaxial layer (12) is formed on an n-type semiconductor substrate (11), and a p+-type body region (14), n+-type current spreading regions (16, 17), and a trench. TR are formed in the n?-type epitaxial layer (12). A bottom surface B1 of the trench TR is located in the p+-type body region (14), a side surface S1 of the trench TR is in contact with the n+-type current spreading region (17), and a side surface S2 of the trench TR is in contact with the n+-type current spreading region (16). Here, a ratio of silicon is higher than a ratio of carbon in an upper surface T1 of the n?-type epitaxial layer (12), and the bottom surface B1, the side surface S1, and the side surface 32 of the trench.

Abstract: In a method for manufacturing a reformed SiC wafer 41 (a surface treatment method for a SiC wafer) having its surface that is reformed by processing an untreated SiC wafer 40 before formation of an epitaxial layer 42, the method includes a surface reforming step as described below. That is, the untreated SiC wafer 40 includes BPDs as dislocations parallel to an inside of a (0001) face, and TEDs. Property of the surface of the untreated SiC wafer 40 is changed so as to have higher rate in which portions having BPDs on the surface of the untreated SiC wafer 40 propagate as TEDs at a time of forming the epitaxial layer 42.

Abstract: In a method for manufacturing a device fabrication wafer, an SiC epitaxial wafer that is an SiC wafer 40 having a monocrystalline SiC epitaxial layer formed thereon is subjected to a basal plane dislocation density reduction step of reducing the density of basal plane dislocations existing in the epitaxial layer of the SiC epitaxial wafer, to thereby manufacture the device fabrication wafer for use to fabricate a semiconductor device. In the basal plane dislocation density reduction step, the SiC epitaxial wafer is heated under Si vapor pressure for a predetermined time necessary to reduce the density of basal plane dislocations, without formation of a cap layer on the SiC epitaxial wafer, so that the density of basal plane dislocations is reduced with suppression of surface roughening.

Abstract: In a method for manufacturing an SiC wafer, a work-affected layer removal step of removing a work-affected layer generated in a surface and inside of an SiC wafer is performed, so that the SiC wafer from which the work-affected layer is at least partially removed is manufactured. In the work-affected layer removal step, the SiC wafer having undergone a polishing step is etched with an etching amount of 10 ?m or less by being heated under Si vapor pressure so that the work-affected layer is removed. In the polishing step, an oxidizer is used to produce a reaction product in the SiC wafer while abrasive grains are used to remove the reaction product. In the SiC wafer having undergone the polishing step, an internal stress caused by the work-affected layer is present at a location inner than the work-affected layer, and an internal stress of the SiC wafer is reduced by removing the work-affected layer in the work-affected layer removal step.

Abstract: An object is to provide a SiC wafer in which a detection rate of an optical sensor can improved and a SiC wafer manufacturing method. The method includes: a satin finishing process S141 of satin-finishing at least a back surface 22 of a SiC wafer 20; an etching process 21 of etching at least the back surface 22 of the SiC wafer 20 by heating under Si vapor pressure after the satin finishing process S141; and a mirror surface processing process S31 of mirror-processing a main surface 21 of the SiC wafer 20 after the etching process S21. Accordingly, it is possible to obtain a SiC wafer having the mirror-finished main surface 21 and the satin-finished back surface 22.

Abstract: A susceptor is a component for placing a SiC substrate in forming an epitaxial layer on a main surface of the SiC substrate. In this susceptor, a support surface and a recess are formed. The support surface is formed on lower position than an upper surface of the susceptor and supports an outer circumferential of the rear face of the SiC substrate. The recess is formed in the inside of the diametrical direction than the support surface, and at least the surface is made of a tantalum carbide, the depth of that is not in contact with the rear face of the Sic substrate in forming the epitaxial layer.

Abstract: A heat treatment container (1) is provided with support members (6) for supporting a disc-shaped SiC substrate (2), which is an object, at a time of an etching treatment of the SiC substrate (2). Each of the support members (6) has an inclined surface (6F) for supporting a lower surface end (2E) of the SiC substrate (2), the inclined surface being inclined so as to increasingly approach the centerline of the SiC substrate (2) going downward. More specifically, each of the support members (6) is formed in a conical shape with a diameter that increases going downward, and a conical surface which is the peripheral surface of each supporting member forms the inclined surface (6F). A vertically-middle section of the inclined surface (6F) contacts the lower surface end (2E) of the SiC substrate (2).

Abstract: Provided is a surface treatment method for a SiC substrate (40), the method being capable of controlling whether to generate a step bunching or the type of step bunching that is generated. In the surface treatment method in which the surface of the SiC substrate (40) is etched by heating the SiC substrate (40) under Si vapor pressure, an etching mode and an etching depth which are determined at least on the basis of an etching rate, are controlled to etch the SiC substrate (40), so that a surface pattern of the SiC substrate (40) after etching treatment is controlled.

Abstract: In a method for manufacturing a reformed SiC wafer 41 (a surface treatment method for a SiC wafer) having its surface that is reformed by processing an untreated SiC wafer 40 before formation of an epitaxial layer 42, the method includes a surface reforming step as described below. That is, the untreated SiC wafer 40 includes BPDs as dislocations parallel to an inside of a (0001) face, and TEDs. Property of the surface of the untreated SiC wafer 40 is changed so as to have higher rate in which portions having BPDs on the surface of the untreated SiC wafer 40 propagate as TEDs at a time of forming the epitaxial layer 42.

Abstract: Provided are a susceptor that, in forming a thin film on a wafer, can reduce impurities or the like adhering to the wafer and a method for manufacturing the same. A susceptor includes a base material (10) with a recess (11), a tantalum carbide layer (22) formed directly on a bottom surface (11a) and a side surface (11b) of the recess (11), and a silicon carbide layer (20) formed on a surface of the base material (10) except for the recess (11).

Abstract: Provided is a method for controlling the rate of etching of a SiC substrate based on a composition of a storing container. The etching method of the present invention is for etching the SiC substrate by heating the SiC substrate under Si vapor pressure, in a state where the SiC substrate is stored in a crucible. The crucible is formed of a tantalum metal, and has a tantalum carbide layer provided on an internal space side of the tantalum metal, and a tantalum silicide layer provided on the side further toward the internal space side than the tantalum carbide layer. The rate of etching of the SiC substrate is controlled based on difference in a composition of the tantalum silicide layer.

Abstract: Provided is an inexpensive seed material for liquid phase epitaxial growth of silicon carbide. A seed material 12 for liquid phase epitaxial growth of a monocrystalline silicon carbide includes a surface layer containing a polycrystalline silicon carbide with a 3C crystal polymorph. Upon X-ray diffraction of the surface layer thereof, a first-order diffraction peak corresponding to a (111) crystal plane is observed as a diffraction peak corresponding to the polycrystalline silicon carbide with a 3C crystal polymorph but no other first-order diffraction peak having a diffraction intensity of 10% or more of the diffraction intensity of the first-order diffraction peak corresponding to the (111) crystal plane is observed.

Abstract: A heat treatment container (1) is provided with support members (6) for supporting a disc-shaped SiC substrate (2), which is an object, at a time of an etching treatment of the SiC substrate (2). Each of the support members (6) has an inclined surface (6F) for supporting a lower surface end (2E) of the SiC substrate (2), the inclined surface being inclined so as to increasingly approach the centerline of the SiC substrate (2) going downward. More specifically, each of the support members (6) is formed in a conical shape with a diameter that increases going downward, and a conical surface which is the peripheral surface of each supporting member forms the inclined surface (6F). A vertically-middle section of the inclined surface (6F) contacts the lower surface end (2E) of the SiC substrate (2).

Abstract: Provided is a SiC substrate treatment method for, with respect to a SiC substrate (40) that has, on its surface, grooves (41), activating ions while preventing roughening of the surface of the substrate. In the method, an ion activation treatment in which the SiC substrate (40) is heated under Si vapor pressure is performed to the SiC substrate (40) has, on its surface, an ion implantation region (46) in which ions have been implanted, and has the grooves (41) provided in a region including at least the ion implantation region (46), thereby ions that are implanted in the SiC substrate (40) is activated while etching the surface of the substrate.

Abstract: This method for estimating the depth of latent scratches in SiC substrates includes an etching step, a measurement step, and an estimation step. In the etching step, a SiC substrate in which at least the surface is formed from single crystal SiC, and which has been subjected to machining, is subjected to heat treatment under Si atmosphere to etch the surface of the SiC substrate. In the measurement step, the surface roughness or the residual stress of the SiC substrate which has been subjected to the etching step is measured. In the estimation step, the depth of latent scratches or the presence or absence of latent scratches in the SiC substrate before the etching step are estimated on the basis of the results obtained in the measurement step.

Abstract: Provided is a method for manufacturing a thin SiC wafer by which a SiC wafer is thinned using a method without generating crack or the like, the method in which polishing after adjusting the thickness of the SiC wafer can be omitted. The method for manufacturing the thin SiC wafer 40 includes a thinning step. In the thinning step, the thickness of the SiC wafer 40 can be decreased to 100 ?m or less by performing the Si vapor pressure etching in which the surface of the SiC wafer 40 is etched by heating the SiC wafer 40 after cutting out of an ingot 4 under Si vapor pressure.

Abstract: Provided is a surface treatment method for a SiC substrate (40), the method being capable of controlling whether to generate a step bunching or the type of step bunching that is generated. In the surface treatment method in which the surface of the SiC substrate (40) is etched by heating the SiC substrate (40) under Si vapor pressure, an etching mode and an etching depth which are determined at least on the basis of an etching rate, are controlled to etch the SiC substrate (40), so that a surface pattern of the SiC substrate (40) after etching treatment is controlled.

Abstract: Provided is a SiC substrate treatment method for, with respect to a SiC substrate (40) that has, on its surface, grooves (41), activating ions while preventing roughening of the surface of the substrate. In the method, an ion activation treatment in which the SiC substrate (40) is heated under Si vapor pressure is performed to the SiC substrate (40) has, on its surface, an ion implantation region (46) in which ions have been implanted, and has the grooves (41) provided in a region including at least the ion implantation region (46), thereby ions that are implanted in the SiC substrate (40) is activated while etching the surface of the substrate.

Abstract: Provided is a method for controlling the rate of etching of a SiC substrate based on a composition of a storing container. The etching method of the present invention is for etching the SiC substrate by heating the SiC substrate under Si vapor pressure, in a state where the SiC substrate is stored in a crucible. The crucible is formed of a tantalum metal, and has a tantalum carbide layer provided on an internal space side of the tantalum metal, and a tantalum silicide layer provided on the side further toward the internal space side than the tantalum carbide layer. The rate of etching of the SiC substrate is controlled based on difference in a composition of the tantalum silicide layer.

Abstract: Provided is a method for manufacturing a thin SiC wafer by which a SiC wafer is thinned using a method without generating crack or the like, the method in which polishing after adjusting the thickness of the SiC wafer can be omitted. The method for manufacturing the thin SiC wafer 40 includes a thinning step. In the thinning step, the thickness of the SiC wafer 40 can be decreased to 100 ?m or less by performing the Si vapor pressure etching in which the surface of the SiC wafer 40 is etched by heating the SiC wafer 40 after cutting out of an ingot 4 under Si vapor pressure.