Patents by Inventor Satoru Sawahata

Satoru Sawahata has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6038150
    Abstract: A secondary subcircuit of a converter circuit is disclosed where a method and circuit for operating a transistor to prevent reverse conduction of the current in the secondary subcircuit is disclosed. The diode in the secondary subcircuits of the prior art is replaced by a transistor and the circuitry for controlling the transistor is made part of the control circuit (ASIC). The secondary converter subcircuit includes a secondary coil for generating a voltage that passes through a first transistor M1, a capacitor, and a second transistor M2, where the output terminal of the subcircuit is across said capacitor. A presently preferred embodiment of a control circuit detects the voltage level at a sync node and the output voltage level at the output terminal and controls transistors M1 and M2 accordingly in generating the desired voltage level at the output terminal.
    Type: Grant
    Filed: March 13, 1998
    Date of Patent: March 14, 2000
    Inventors: Hsian-Pei Yee, Satoru Sawahata, Masaru Wakatabe
  • Patent number: 5736890
    Abstract: A rectifying device comprising of a SRMOS, an inductor, and a control circuit is disclosed. The SRMOS has a gate, a drain, and a source. The gate of the SRMOS is connected to the output of the control circuit. The inductor is connected to the drain of the SRMOS. The control circuit uses two sense traces for determining the voltage (or current) passing between the inductor (that is connected to the drain) and the source of the SRMOS. Upon sensing a forward characteristic (voltage or current), the SRMOS forward biases to allow current to flow through the SRMOS. Upon sensing a reverse characteristic (voltage or current), the SRMOS reverse biases to cut off any current flow. Hysteresis is used in setting the forward biasing threshold voltage and the reverse biasing threshold voltage for the SRMOS. In reverse biasing and forward biasing the SRMOS, V.sub.gs is stepped (or curved) controlled to avoid false turn ON/OFF of the SRMOS.
    Type: Grant
    Filed: April 3, 1996
    Date of Patent: April 7, 1998
    Assignees: Semi Technology Design, Inc., Shindergen Electric Mfg. Co., Ltd
    Inventors: H. P. Yee, Hiromi Ito, Kenji Horiguchi, Satoru Sawahata