Patents by Inventor Satoru Tomie

Satoru Tomie has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9859185
    Abstract: A semiconductor packaging structure includes a copper heat-sink with a shim projection which provides a stress release structure. The heat-sink with the shim projection may be used in conjunction with a pedestal in order to further reduce the thermal stress produced from the mismatch of thermal properties between the copper heat-sink metal and the ceramic frame. The copper heat-sink with a shim projection may also be part of the semiconductor package along with a lead frame, the ceramic frame, a semiconductor device, a capacitor, a wire bond and a ceramic lid or an encapsulation. The copper heat-sink, the ceramic frame and the lead frame are all chosen to be cost effective, and chosen such that the packaging process for the semiconductor device is able to achieve a smaller size while maintaining high reliability, low cost, and suitability for volume manufacturing.
    Type: Grant
    Filed: January 27, 2017
    Date of Patent: January 2, 2018
    Assignee: Kyocera International, Inc.
    Inventors: Satoru Tomie, Mark Eblen, Eiji Watanabe, Eiji Tanaka
  • Publication number: 20170221790
    Abstract: A semiconductor packaging structure includes a copper heat-sink with a shim projection which provides a stress release structure. The heat-sink with the shim projection may be used in conjunction with a pedestal in order to further reduce the thermal stress produced from the mismatch of thermal properties between the copper heat-sink metal and the ceramic frame. The copper heat-sink with a shim projection may also be part of the semiconductor package along with a lead frame, the ceramic frame, a semiconductor device, a capacitor, a wire bond and a ceramic lid or an encapsulation. The copper heat-sink, the ceramic frame and the lead frame are all chosen to be cost effective, and chosen such that the packaging process for the semiconductor device is able to achieve a smaller size while maintaining high reliability, low cost, and suitability for volume manufacturing.
    Type: Application
    Filed: January 27, 2017
    Publication date: August 3, 2017
    Inventors: Satoru TOMIE, Mark EBLEN, Eiji WATANABE, Eiji TANAKA
  • Publication number: 20160377823
    Abstract: An optical module includes a high-thermal-expansion ceramic substrate on which is mounted a planar lightwave circuit as well as at least one device component. The high-thermal-expansion ceramic substrate may be used in conjunction with a high-thermal-expansion metal in order to reduce thermal stress produced from the mismatch of thermal properties within the optical module. The high-thermal-expansion ceramic substrate may also be part of an optical module package which includes a die attach area, on which at least one device can be mounted, and a circuit pattern which electrically connects the at least one device to other at least one device components. A high-thermal-expansion metal may also be used with the high-thermal-expansion ceramic substrate in order to reduce the thermal stress that would otherwise exist in the optical module package.
    Type: Application
    Filed: June 24, 2016
    Publication date: December 29, 2016
    Inventors: Paul GARLAND, Satoru TOMIE, Eiji WATANABE, Nobuo TAKESHITA
  • Patent number: 7924493
    Abstract: A Faraday rotator mirror which is compact, allows high workability of manufacturing and has high reliability and high coupling efficiency is provided. The Faraday rotator mirror comprises a graded-index fiber, a Faraday rotator and a reflector mirror, wherein light incident via the graded-index fiber passes through the Faraday rotator to be reflected on the reflector mirror, and the reflected light passes through the Faraday rotator and emerges through the graded-index fiber.
    Type: Grant
    Filed: February 24, 2006
    Date of Patent: April 12, 2011
    Assignee: Kyocera Corporation
    Inventors: Yusuke Takei, Tetsuya Suga, Satoru Tomie, Yasushi Sato, Michifumi Shoda
  • Publication number: 20090231665
    Abstract: A Faraday rotator mirror which is compact, allows high workability of manufacturing and has high reliability and high coupling efficiency is provided. The Faraday rotator mirror comprises a graded-index fiber, a Faraday rotator and a reflector mirror, wherein light incident via the graded-index fiber passes through the Faraday rotator to be reflected on the reflector mirror, and the reflected light passes through the Faraday rotator and emerges through the graded-index fiber.
    Type: Application
    Filed: February 24, 2006
    Publication date: September 17, 2009
    Applicant: KYOCERA CORPORATION
    Inventors: Yusuke Takei, Tetsuya Suga, Satoru Tomie, Yasushi Sato, Michifumi Shoda
  • Patent number: 6369324
    Abstract: In a conventional high-frequency input/output feedthrough having a microstrip line, for a millimeter wave band, the reliability of a hermetic seal portion was low and transmission characteristics in the millimeter wave band were not preferable.
    Type: Grant
    Filed: August 27, 1998
    Date of Patent: April 9, 2002
    Assignee: Kyocera Corporation
    Inventor: Satoru Tomie
  • Patent number: 6365961
    Abstract: A high-frequency input/output feedthrough comprises a lower dielectric substrate in which are formed a bottom face ground layer, side ground layers, a line conductor and cofacial ground layers (formed on both sides of the line conductor on one and the same face of the lower dielectric substrate); and an upper dielectric substrate joined to the lower dielectric substrate so that portions of the line conductor and cofacial ground layers are sandwiched between the lower and upper dielectric substrate. In order to suppress return and insertion losses of signal in millimeter wave range due to a difference in transmission mode to improve transmission characteristics, the upper dielectric substrate is made thicker than the lower dielectric substrate. The width of the portion of the line conductor which is sandwiched between the lower dielectric substrate and the upper dielectric substrate is smaller than that of another portion. The cofacial ground layers are projected toward the line conductor.
    Type: Grant
    Filed: January 18, 2000
    Date of Patent: April 2, 2002
    Assignee: Kyocera Corporation
    Inventor: Satoru Tomie
  • Patent number: 6057600
    Abstract: A structure for mounting a high-frequency device on an insulating board having a circuit on a top surface and transmitting signals to the high-frequency device. The high-frequency device is sealed within a cavity on a top surface of a dielectric board. The dielectric board has a first signal transmission line on its top surface and a second signal transmission line on its bottom surface, the first and second signal transmission lines overlapping each other over a portion where the signal is transmitted through coupling of the first and second signal transmission lines. A recess is formed at the top surface of the insulating board below the overlapping portion of the first and second signal transmission lines to suppress transmission loss of the high-frequency signal between the first and second signal transmission lines. The recess may be filled with air or a material having a dielectric constant low than that of the insulating board.
    Type: Grant
    Filed: November 25, 1998
    Date of Patent: May 2, 2000
    Assignee: Kyocera Corporation
    Inventors: Kenji Kitazawa, Shinichi Koriyama, Shigeki Morioka, Satoru Tomie
  • Patent number: 6043556
    Abstract: A high-frequency input/output terminal comprises a lower dielectric substrate in which are formed a bottom face ground layer, side ground layers, a line conductor and cofacial ground layers (formed on both sides of the line conductor on one and the same face of the lower dielectric substrate); and an upper dielectric substrate joined to the lower dielectric substrate so that portions of the line conductor and cofacial ground layers are sandwiched between the lower and upper dielectric substrate. In order to suppress return and insertion losses of signal in millimeter wave range due to a difference in transmission mode to improve transmission characteristics, the upper dielectric substrate is made thicker than the lower dielectric substrate. The width of the portion of the line conductor which is sandwiched between the lower dielectric substrate and the upper dielectric substrate is smaller than that of another portion. The cofacial ground layers are projected toward the line conductor.
    Type: Grant
    Filed: February 26, 1998
    Date of Patent: March 28, 2000
    Assignee: Kyocera Corporation
    Inventor: Satoru Tomie
  • Patent number: 6036375
    Abstract: The invention relates to an optical semiconductor device housing package comprising a base having a mounting portion on an upper surface of which an optical semiconductor device is mounted; a frame attached to the base so as to encircle the mounting portion, the frame having a through-hole in one side thereof; a cylindrically shaped fixing member into which an optical fiber is inserted, the cylindrically shaped fixing member being fixed to the through-hole of the frame; a light-transmitting member attached to one end portion of the fixing member; and a lid member mounted on an upper face of the frame, for hermetically sealing the optical semiconductor device, wherein the light-transmitting member is formed of amorphous glass.
    Type: Grant
    Filed: July 24, 1997
    Date of Patent: March 14, 2000
    Assignee: Kyocera Corporation
    Inventors: Mitsuo Yanagisawa, Kenichi Ura, Satoru Tomie