Patents by Inventor Satoru Wakiyama

Satoru Wakiyama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11848346
    Abstract: An imaging device includes a first semiconductor element including at least one bump pad that has a concave shape. The at least one bump pad includes a first metal layer and a second metal layer on the first metal layer. The imaging device includes a second semiconductor element including at least one electrode. The imaging device includes a microbump electrically connecting the at least one bump pad to the at least one electrode. The microbump includes a diffused portion of the second metal layer, and first semiconductor element or the second semiconductor element includes a pixel unit.
    Type: Grant
    Filed: January 29, 2021
    Date of Patent: December 19, 2023
    Assignee: Sony Semiconductor Solutions Corporation
    Inventors: Satoru Wakiyama, Kan Shimizu, Toshihiko Hayashi, Takuya Nakamura, Naoki Jyo
  • Patent number: 11784197
    Abstract: The present technology relates to a solid-state imaging unit that makes it possible to increase the number of terminals, a method of producing the same, and an electronic apparatus. A solid-state imaging unit includes: an image sensor substrate including a light receiving region in which pixels that each convert incoming light to an electric signal are arranged in a matrix; a solder ball; a glass substrate opposite the image sensor substrate and the solder ball; and a through electrode that couples a wiring line pattern and the solder ball to each other by penetrating a glass adhesive resin interposed between the wiring line pattern and the solder ball. The solder ball is disposed outside the image sensor substrate in a plane direction. The wiring line pattern being formed on the glass substrate. The present disclosure is applicable, for example, to a package and the like including the image sensor substrate.
    Type: Grant
    Filed: April 21, 2022
    Date of Patent: October 10, 2023
    Assignee: Sony Semiconductor Solutions Corporation
    Inventors: Masaya Nagata, Satoru Wakiyama
  • Publication number: 20230291110
    Abstract: A production method of a communication device includes a step of forming an antenna substrate and a circuit substrate independently from each other. The production method also includes a step of joining the antenna substrate and the circuit substrate simultaneously with joining of a power feeding pad and a power feeding path. In brief, the production method executes two discrete steps: forming the circuit substrate and forming the antenna substrate. This improves a production yield of the communication device as compared with the circuit substrate and the antenna substrate are produced in a single step.
    Type: Application
    Filed: February 28, 2023
    Publication date: September 14, 2023
    Inventors: Satoru WAKIYAMA, Akira SHINTAI, Toshifumi SHIROSAKI, Shuji HIRATA
  • Publication number: 20230015360
    Abstract: There is provided an imaging device including: a first semiconductor substrate having a first region that includes a photoelectric conversion section and a via portion, a second region adjacent to the first region, a connection portion disposed at the second region, and a second semiconductor substrate, wherein the connection portion electrically couples the first semiconductor substrate to the second semiconductor substrate in a stacked configuration, and wherein a width of the connection portion is greater than a width of the via portion.
    Type: Application
    Filed: September 23, 2022
    Publication date: January 19, 2023
    Applicant: SONY GROUP CORPORATION
    Inventors: Satoru WAKIYAMA, Yukio TAGAWA
  • Patent number: 11557573
    Abstract: There is provided a semiconductor device including a first semiconductor base substrate, a second semiconductor base substrate that is bonded onto a first surface side of the first semiconductor base substrate, a through electrode that is formed to penetrate from a second surface side of the first semiconductor base substrate to a wiring layer on the second semiconductor base substrate, and an insulation layer that surrounds a circumference of the through electrode formed inside the first semiconductor base substrate.
    Type: Grant
    Filed: May 19, 2021
    Date of Patent: January 17, 2023
    Assignee: SONY GROUP CORPORATION
    Inventors: Satoru Wakiyama, Masaki Okamoto, Yutaka Ooka, Reijiroh Shohji, Yoshifumi Zaizen, Kazunori Nagahata, Masaki Haneda
  • Publication number: 20230005979
    Abstract: There is provided semiconductor devices and methods of forming the same, the semiconductor devices including: a first semiconductor element having a first electrode; a second semiconductor element having a second electrode; a Sn-based micro-solder bump formed on the second electrode; and a concave bump pad including the first electrode opposite to the micro-solder bump, where the first electrode is connected to the second electrode via the micro-solder bump and the concave bump pad.
    Type: Application
    Filed: September 7, 2022
    Publication date: January 5, 2023
    Applicant: SONY GROUP CORPORATION
    Inventors: Satoru WAKIYAMA, Naoki JYO, Kan SHIMIZU, Toshihiko HAYASHI, Takuya NAKAMURA
  • Patent number: 11476291
    Abstract: There is provided semiconductor devices and methods of forming the same, the semiconductor devices including: a first semiconductor element having a first electrode; a second semiconductor element having a second electrode; a Sn-based micro-solder bump formed on the second electrode; and a concave bump pad including the first electrode opposite to the micro-solder bump, where the first electrode is connected to the second electrode via the micro-solder bump and the concave bump pad.
    Type: Grant
    Filed: July 3, 2019
    Date of Patent: October 18, 2022
    Assignee: SONY CORPORATION
    Inventors: Satoru Wakiyama, Naoki Jyo, Kan Shimizu, Toshihiko Hayashi, Takuya Nakamura
  • Publication number: 20220310680
    Abstract: The present disclosure relates to a backside illumination type solid-state imaging device, a manufacturing method for a backside illumination type solid-state imaging device, an imaging apparatus, and electronic equipment by which the manufacturing cost can be reduced. A singulated memory circuit and a singulated logic circuit are laid out in a horizontal direction and are embedded by an oxide film and flattened, and then are stacked so as to be contained in a plane direction under a solid-state imaging element. The present disclosure can be applied to an imaging apparatus.
    Type: Application
    Filed: June 15, 2022
    Publication date: September 29, 2022
    Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Taizo TAKACHI, Yuichi YAMAMOTO, Suguru SAITO, Satoru WAKIYAMA, Yoichi OOTSUKA, Naoki KOMAI, Kaori TAKIMOTO, Tadashi IIJIMA, Masaki HANEDA, Masaya NAGATA
  • Publication number: 20220246655
    Abstract: The present technology relates to a solid-state imaging unit that makes it possible to increase the number of terminals, a method of producing the same, and an electronic apparatus. A solid-state imaging unit includes: an image sensor substrate including a light receiving region in which pixels that each convert incoming light to an electric signal are arranged in a matrix; a solder ball; a glass substrate opposite the image sensor substrate and the solder ball; and a through electrode that couples a wiring line pattern and the solder ball to each other by penetrating a glass adhesive resin interposed between the wiring line pattern and the solder ball. The solder ball is disposed outside the image sensor substrate in a plane direction. The wiring line pattern being formed on the glass substrate. The present disclosure is applicable, for example, to a package and the like including the image sensor substrate.
    Type: Application
    Filed: April 21, 2022
    Publication date: August 4, 2022
    Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Masaya NAGATA, Satoru WAKIYAMA
  • Patent number: 11335715
    Abstract: The present technology relates to a solid-state imaging unit that makes it possible to increase the number of terminals, a method of producing the same, and an electronic apparatus. A solid-state imaging unit includes: an image sensor substrate including a light receiving region in which pixels that convert incoming light to an electric signal are arranged in a matrix; a solder ball; a glass substrate opposite the image sensor substrate and the solder ball; and a through electrode that couples a wiring line pattern and the solder ball to each other by penetrating a glass adhesive resin interposed between the wiring line pattern and the solder ball. The solder ball is disposed outside the image sensor substrate in a plane direction. The wiring line pattern being formed on the glass substrate. The present disclosure is applicable, for example, to a package and the like including the image sensor substrate.
    Type: Grant
    Filed: August 8, 2018
    Date of Patent: May 17, 2022
    Assignee: Sony Semiconductor Solutions Corporation
    Inventors: Masaya Nagata, Satoru Wakiyama
  • Publication number: 20220037382
    Abstract: The present disclosure relates to a backside-illumination solid-state image pickup apparatus and a backside-illumination solid-state image-pickup-apparatus manufacturing method, an image pickup apparatus, and electronic equipment that are configured to make it possible to reduce manufacturing costs. A diced memory circuit and logic circuit are laid out in a horizontal direction, are embedded and flattened by using an oxide film, and are stacked so as to be enclosed in a plane direction under a solid-state image pickup element. The present disclosure can be applied to an image pickup apparatus.
    Type: Application
    Filed: December 6, 2019
    Publication date: February 3, 2022
    Inventors: Naoki KOMAI, Hirotaka YOSHIOKA, Satoru WAKIYAMA, Yuichi YAMAMOTO, Taizo TAKACHI
  • Publication number: 20210399034
    Abstract: A camera module is configured to capture an optical image of a target area and includes a lens member, an imager, a light transmitting member, and a seat. The lens member is configured to receive light from the target area. The imager has a curved portion convex in a direction away from the lens member and is configured to capture the optical image formed on the curved portion. The light transmitting member optically couples the lens member and the imager. The seat has a supporting portion that supports an outer rim of the imager and a fluid space defined inside the supporting portion. A heat dissipation fluid undergoes convection in the fluid space. The curved portion is interposed between the light transmitting member and the seat having the supporting portion and the fluid space.
    Type: Application
    Filed: June 16, 2021
    Publication date: December 23, 2021
    Inventors: Kouji SATOU, Hiroki SASAKI, Shotaro MIYAWAKI, Akira WADA, Satoru WAKIYAMA, Kazuhiro AOYAMA
  • Publication number: 20210272933
    Abstract: There is provided a semiconductor device including a first semiconductor base substrate, a second semiconductor base substrate that is bonded onto a first surface side of the first semiconductor base substrate, a through electrode that is formed to penetrate from a second surface side of the first semiconductor base substrate to a wiring layer on the second semiconductor base substrate, and an insulation layer that surrounds a circumference of the through electrode formed inside the first semiconductor base substrate.
    Type: Application
    Filed: May 19, 2021
    Publication date: September 2, 2021
    Applicant: Sony Group Corporation
    Inventors: Satoru Wakiyama, Masaki Okamoto, Yutaka Ooka, Reijiroh Shohji, Yoshifumi Zaizen, Kazunori Nagahata, Masaki Haneda
  • Publication number: 20210225921
    Abstract: An imaging device includes a first semiconductor element including at least one bump pad that has a concave shape. The at least one bump pad includes a first metal layer and a second metal layer on the first metal layer. The imaging device includes a second semiconductor element including at least one electrode. The imaging device includes a microbump electrically connecting the at least one bump pad to the at least one electrode. The microbump includes a diffused portion of the second metal layer, and first semiconductor element or the second semiconductor element includes a pixel unit.
    Type: Application
    Filed: January 29, 2021
    Publication date: July 22, 2021
    Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Satoru WAKIYAMA, Kan SHIMIZU, Toshihiko HAYASHI, Takuya NAKAMURA, Naoki JYO
  • Patent number: 11063020
    Abstract: There is provided a semiconductor device a method for manufacturing a semiconductor device, and an electronic apparatus that comprises a semiconductor device, the semiconductor device including a first chip, a second chip that is bonded onto a first surface side of the first chip, a through electrode that is formed to penetrate from a second surface side of the first chip to a wiring layer on the second semiconductor base substrate, and an insulation layer that is disposed between the through electrode and a semiconductor base substrate in the first chip.
    Type: Grant
    Filed: July 24, 2019
    Date of Patent: July 13, 2021
    Assignee: SONY CORPORATION
    Inventors: Satoru Wakiyama, Masaki Okamoto, Yutaka Ooka, Reijiroh Shohji, Yoshifumi Zaizen, Kazunori Nagahata, Masaki Haneda
  • Patent number: 10930695
    Abstract: An imaging device includes a first semiconductor element including at least one bump pad that has a concave shape. The at least one bump pad includes a first metal layer and a second metal layer on the first metal layer. The imaging device includes a second semiconductor element including at least one electrode. The imaging device includes a microbump electrically connecting the at least one bump pad to the at least one electrode. The microbump includes a diffused portion of the second metal layer, and first semiconductor element or the second semiconductor element includes a pixel unit.
    Type: Grant
    Filed: October 7, 2016
    Date of Patent: February 23, 2021
    Assignee: Sony Semiconductor Solutions Corporation
    Inventors: Satoru Wakiyama, Kan Shimizu, Toshihiko Hayashi, Takuya Nakamura, Naoki Jyo
  • Publication number: 20200258924
    Abstract: The present disclosure relates to a backside illumination type solid-state imaging device, a manufacturing method for a backside illumination type solid-state imaging device, an imaging apparatus, and electronic equipment by which the manufacturing cost can be reduced. A singulated memory circuit and a singulated logic circuit are laid out in a horizontal direction and are embedded by an oxide film and flattened, and then are stacked so as to be contained in a plane direction under a solid-state imaging element. The present disclosure can be applied to an imaging apparatus.
    Type: Application
    Filed: October 16, 2018
    Publication date: August 13, 2020
    Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Taizo TAKACHI, Yuichi YAMAMOTO, Suguru SAITO, Satoru WAKIYAMA, Yoichi OOTSUKA, Naoki KOMAI, Kaori TAKIMOTO, Tadashi IIJIMA, Masaki HANEDA, Masaya NAGATA
  • Publication number: 20200203408
    Abstract: The present technology relates to a solid-state imaging unit that makes it possible to increase the number of terminals, a method of producing the same, and an electronic apparatus. A solid-state imaging unit includes: an image sensor substrate including a light receiving region in which pixels that convert incoming light to an electric signal are arranged in a matrix; a solder ball; a glass substrate opposite the image sensor substrate and the solder ball; and a through electrode that couples a wiring line pattern and the solder ball to each other by penetrating a glass adhesive resin interposed between the wiring line pattern and the solder ball. The solder ball is disposed outside the image sensor substrate in a plane direction. The wiring line pattern being formed on the glass substrate. The present disclosure is applicable, for example, to a package and the like including the image sensor substrate.
    Type: Application
    Filed: August 8, 2018
    Publication date: June 25, 2020
    Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Masaya NAGATA, Satoru WAKIYAMA
  • Patent number: 10672822
    Abstract: A semiconductor unit includes: a first device substrate including a first semiconductor substrate and a first wiring layer, in which the first wiring layer is provided on one surface side of the first semiconductor substrate; a second device substrate including a second semiconductor substrate and a second wiring layer, in which the second device substrate is bonded to the first device substrate, and the second wiring layer is provided on one surface side of the second semiconductor substrate; a through-electrode penetrating the first device substrate and a part or all of the second device substrate, and electrically connecting the first wiring layer and the second wiring layer to each other; and an insulating layer provided in opposition to the through-electrode, and penetrating one of the first semiconductor substrate and the second semiconductor substrate.
    Type: Grant
    Filed: March 13, 2018
    Date of Patent: June 2, 2020
    Assignee: SONY CORPORATION
    Inventors: Satoru Wakiyama, Hiroshi Ozaki
  • Patent number: 10600838
    Abstract: There is provided semiconductor devices and methods of forming the same, the semiconductor devices including: a first semiconductor element having a first electrode; a second semiconductor element having a second electrode; a Sn-based micro-solder bump formed on the second electrode; and a concave bump pad including the first electrode opposite to the micro-solder bump, where the first electrode is connected to the second electrode via the micro-solder bump and the concave bump pad.
    Type: Grant
    Filed: April 15, 2015
    Date of Patent: March 24, 2020
    Assignee: SONY CORPORATION
    Inventors: Satoru Wakiyama, Naoki Jyo, Kan Shimizu, Toshihiko Hayashi, Takuya Nakamura