Patents by Inventor Satoru Wakiyama

Satoru Wakiyama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210272933
    Abstract: There is provided a semiconductor device including a first semiconductor base substrate, a second semiconductor base substrate that is bonded onto a first surface side of the first semiconductor base substrate, a through electrode that is formed to penetrate from a second surface side of the first semiconductor base substrate to a wiring layer on the second semiconductor base substrate, and an insulation layer that surrounds a circumference of the through electrode formed inside the first semiconductor base substrate.
    Type: Application
    Filed: May 19, 2021
    Publication date: September 2, 2021
    Applicant: Sony Group Corporation
    Inventors: Satoru Wakiyama, Masaki Okamoto, Yutaka Ooka, Reijiroh Shohji, Yoshifumi Zaizen, Kazunori Nagahata, Masaki Haneda
  • Publication number: 20210225921
    Abstract: An imaging device includes a first semiconductor element including at least one bump pad that has a concave shape. The at least one bump pad includes a first metal layer and a second metal layer on the first metal layer. The imaging device includes a second semiconductor element including at least one electrode. The imaging device includes a microbump electrically connecting the at least one bump pad to the at least one electrode. The microbump includes a diffused portion of the second metal layer, and first semiconductor element or the second semiconductor element includes a pixel unit.
    Type: Application
    Filed: January 29, 2021
    Publication date: July 22, 2021
    Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Satoru WAKIYAMA, Kan SHIMIZU, Toshihiko HAYASHI, Takuya NAKAMURA, Naoki JYO
  • Patent number: 11063020
    Abstract: There is provided a semiconductor device a method for manufacturing a semiconductor device, and an electronic apparatus that comprises a semiconductor device, the semiconductor device including a first chip, a second chip that is bonded onto a first surface side of the first chip, a through electrode that is formed to penetrate from a second surface side of the first chip to a wiring layer on the second semiconductor base substrate, and an insulation layer that is disposed between the through electrode and a semiconductor base substrate in the first chip.
    Type: Grant
    Filed: July 24, 2019
    Date of Patent: July 13, 2021
    Assignee: SONY CORPORATION
    Inventors: Satoru Wakiyama, Masaki Okamoto, Yutaka Ooka, Reijiroh Shohji, Yoshifumi Zaizen, Kazunori Nagahata, Masaki Haneda
  • Patent number: 10930695
    Abstract: An imaging device includes a first semiconductor element including at least one bump pad that has a concave shape. The at least one bump pad includes a first metal layer and a second metal layer on the first metal layer. The imaging device includes a second semiconductor element including at least one electrode. The imaging device includes a microbump electrically connecting the at least one bump pad to the at least one electrode. The microbump includes a diffused portion of the second metal layer, and first semiconductor element or the second semiconductor element includes a pixel unit.
    Type: Grant
    Filed: October 7, 2016
    Date of Patent: February 23, 2021
    Assignee: Sony Semiconductor Solutions Corporation
    Inventors: Satoru Wakiyama, Kan Shimizu, Toshihiko Hayashi, Takuya Nakamura, Naoki Jyo
  • Publication number: 20200258924
    Abstract: The present disclosure relates to a backside illumination type solid-state imaging device, a manufacturing method for a backside illumination type solid-state imaging device, an imaging apparatus, and electronic equipment by which the manufacturing cost can be reduced. A singulated memory circuit and a singulated logic circuit are laid out in a horizontal direction and are embedded by an oxide film and flattened, and then are stacked so as to be contained in a plane direction under a solid-state imaging element. The present disclosure can be applied to an imaging apparatus.
    Type: Application
    Filed: October 16, 2018
    Publication date: August 13, 2020
    Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Taizo TAKACHI, Yuichi YAMAMOTO, Suguru SAITO, Satoru WAKIYAMA, Yoichi OOTSUKA, Naoki KOMAI, Kaori TAKIMOTO, Tadashi IIJIMA, Masaki HANEDA, Masaya NAGATA
  • Publication number: 20200203408
    Abstract: The present technology relates to a solid-state imaging unit that makes it possible to increase the number of terminals, a method of producing the same, and an electronic apparatus. A solid-state imaging unit includes: an image sensor substrate including a light receiving region in which pixels that convert incoming light to an electric signal are arranged in a matrix; a solder ball; a glass substrate opposite the image sensor substrate and the solder ball; and a through electrode that couples a wiring line pattern and the solder ball to each other by penetrating a glass adhesive resin interposed between the wiring line pattern and the solder ball. The solder ball is disposed outside the image sensor substrate in a plane direction. The wiring line pattern being formed on the glass substrate. The present disclosure is applicable, for example, to a package and the like including the image sensor substrate.
    Type: Application
    Filed: August 8, 2018
    Publication date: June 25, 2020
    Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Masaya NAGATA, Satoru WAKIYAMA
  • Patent number: 10672822
    Abstract: A semiconductor unit includes: a first device substrate including a first semiconductor substrate and a first wiring layer, in which the first wiring layer is provided on one surface side of the first semiconductor substrate; a second device substrate including a second semiconductor substrate and a second wiring layer, in which the second device substrate is bonded to the first device substrate, and the second wiring layer is provided on one surface side of the second semiconductor substrate; a through-electrode penetrating the first device substrate and a part or all of the second device substrate, and electrically connecting the first wiring layer and the second wiring layer to each other; and an insulating layer provided in opposition to the through-electrode, and penetrating one of the first semiconductor substrate and the second semiconductor substrate.
    Type: Grant
    Filed: March 13, 2018
    Date of Patent: June 2, 2020
    Assignee: SONY CORPORATION
    Inventors: Satoru Wakiyama, Hiroshi Ozaki
  • Patent number: 10600838
    Abstract: There is provided semiconductor devices and methods of forming the same, the semiconductor devices including: a first semiconductor element having a first electrode; a second semiconductor element having a second electrode; a Sn-based micro-solder bump formed on the second electrode; and a concave bump pad including the first electrode opposite to the micro-solder bump, where the first electrode is connected to the second electrode via the micro-solder bump and the concave bump pad.
    Type: Grant
    Filed: April 15, 2015
    Date of Patent: March 24, 2020
    Assignee: SONY CORPORATION
    Inventors: Satoru Wakiyama, Naoki Jyo, Kan Shimizu, Toshihiko Hayashi, Takuya Nakamura
  • Publication number: 20190348398
    Abstract: There is provided a semiconductor device a method for manufacturing a semiconductor device, and an electronic apparatus that comprises a semiconductor device, the semiconductor device including a first chip, a second chip that is bonded onto a first surface side of the first chip, a through electrode that is formed to penetrate from a second surface side of the first chip to a wiring layer on the second semiconductor base substrate, and an insulation layer that is disposed between the through electrode and a semiconductor base substrate in the first chip.
    Type: Application
    Filed: July 24, 2019
    Publication date: November 14, 2019
    Applicant: Sony Corporation
    Inventors: Satoru Wakiyama, Masaki Okamoto, Yutaka Ooka, Reijiroh Shohji, Yoshifumi Zaizen, Kazunori Nagahata, Masaki Haneda
  • Publication number: 20190333954
    Abstract: The present disclosure relates to a solid-state image sensor, a manufacturing method, and an electronic device that enable control of a wafer process and a chip size package (CSP) process even with no cover glass.—A CIS wafer and a logic wafer including a logic circuit or a memory circuit are stacked and bonded. The CIS wafer and the logic wafer are electrically connected via a through electrode. After formation of a lens on a light receiving surface of the CIS wafer, a wafer support system material is bonded on the lens. An external electrode is formed as an external output, using a TSV formed from a back surface side of the logic wafer that has been made into a thin film. The wafer support system material is then separated from the light receiving surface. The present disclosure can be applied to, for example, a stacked-type back-illuminated solid-state image sensor.
    Type: Application
    Filed: November 1, 2017
    Publication date: October 31, 2019
    Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventor: Satoru WAKIYAMA
  • Publication number: 20190326344
    Abstract: There is provided semiconductor devices and methods of forming the same, the semiconductor devices including: a first semiconductor element having a first electrode; a second semiconductor element having a second electrode; a Sn-based micro-solder bump formed on the second electrode; and a concave bump pad including the first electrode opposite to the micro-solder bump, where the first electrode is connected to the second electrode via the micro-solder bump and the concave bump pad.
    Type: Application
    Filed: July 3, 2019
    Publication date: October 24, 2019
    Applicant: Sony Corporation
    Inventors: Satoru WAKIYAMA, Naoki JYO, Kan SHIMIZU, Toshihiko HAYASHI, Takuya NAKAMURA
  • Patent number: 10446598
    Abstract: A method of manufacturing a semiconductor device includes: forming, on a cover glass, a film having a predetermined specific gravity and configured to shield an alpha ray that arises from the cover glass; and bonding the cover glass on which the film is formed and an image pickup device, by filling a transparent resin between the cover glass and the image pickup device.
    Type: Grant
    Filed: August 27, 2018
    Date of Patent: October 15, 2019
    Assignee: Sony Corporation
    Inventors: Satoru Wakiyama, Taizo Takachi
  • Patent number: 10373934
    Abstract: There is provided a semiconductor device and an electronic apparatus that comprises a semiconductor device, the semiconductor device including a first chip, a second chip that is bonded onto a first surface side of the first chip, a through electrode that is formed to penetrate from a second surface side of the first chip to a second wiring layer on the second semiconductor base substrate, and an insulation layer that is disposed between the through electrode and a semiconductor base substrate in the first chip.
    Type: Grant
    Filed: February 2, 2018
    Date of Patent: August 6, 2019
    Assignee: Sony Corporation
    Inventors: Satoru Wakiyama, Masaki Okamoto, Yutaka Ooka, Reijiroh Shohji, Yoshifumi Zaizen, Kazunori Nagahata, Masaki Haneda
  • Publication number: 20190013341
    Abstract: A method of manufacturing a semiconductor device includes: forming, on a cover glass, a film having a predetermined specific gravity and configured to shield an alpha ray that arises from the cover glass; and bonding the cover glass on which the film is formed and an image pickup device, by filling a transparent resin between the cover glass and the image pickup device.
    Type: Application
    Filed: August 27, 2018
    Publication date: January 10, 2019
    Applicant: Sony Corporation
    Inventors: Satoru WAKIYAMA, Taizo TAKACHI
  • Patent number: 10153314
    Abstract: The present technology relates to a semiconductor apparatus, a solid-state image pickup device, an image pickup apparatus, and an electronic apparatus capable of improving impedance characteristics while preventing an occurrence of a flare and an interference due to a bonding jig, and achieving downsizing an apparatus. By aligning the heights of a cover glass and a semiconductor device, a distance between the cover glass and the semiconductor device is set to be minimum, and thus it is possible to suppress an occurrence of a flare due to incident light reflected on a side surface of the semiconductor device, and improve the impedance characteristics of the semiconductor device and the semiconductor image pickup device. Further, the interference of the jig used for the semiconductor device is reduced. The present technology can be applied to a CMOS image sensor.
    Type: Grant
    Filed: December 2, 2015
    Date of Patent: December 11, 2018
    Assignee: SONY CORPORATION
    Inventor: Satoru Wakiyama
  • Publication number: 20180308891
    Abstract: An imaging device includes a first semiconductor element including at least one bump pad that has a concave shape. The at least one bump pad includes a first metal layer and a second metal layer on the first metal layer. The imaging device includes a second semiconductor element including at least one electrode. The imaging device includes a microbump electrically connecting the at least one bump pad to the at least one electrode. The microbump includes a diffused portion of the second metal layer, and first semiconductor element or the second semiconductor element includes a pixel unit.
    Type: Application
    Filed: October 7, 2016
    Publication date: October 25, 2018
    Applicant: SONY SEMICONDUCTOR SOLUTIONS CORPORATION
    Inventors: Satoru WAKIYAMA, Kan SHIMIZU, Toshihiko HAYASHI, Takuya NAKAMURA, Naoki JYO
  • Patent number: 10084003
    Abstract: A method of manufacturing a semiconductor device includes: forming, on a cover glass, a film having a predetermined specific gravity and configured to shield an alpha ray that arises from the cover glass; and bonding the cover glass on which the film is formed and an image pickup device, by filling a transparent resin between the cover glass and the image pickup device.
    Type: Grant
    Filed: March 9, 2017
    Date of Patent: September 25, 2018
    Assignee: Sony Corporation
    Inventors: Satoru Wakiyama, Taizo Takachi
  • Publication number: 20180204872
    Abstract: A semiconductor unit includes: a first device substrate including a first semiconductor substrate and a first wiring layer, in which the first wiring layer is provided on one surface side of the first semiconductor substrate; a second device substrate including a second semiconductor substrate and a second wiring layer, in which the second device substrate is bonded to the first device substrate, and the second wiring layer is provided on one surface side of the second semiconductor substrate; a through-electrode penetrating the first device substrate and a part or all of the second device substrate, and electrically connecting the first wiring layer and the second wiring layer to each other; and an insulating layer provided in opposition to the through-electrode, and penetrating one of the first semiconductor substrate and the second semiconductor substrate.
    Type: Application
    Filed: March 13, 2018
    Publication date: July 19, 2018
    Inventors: SATORU WAKIYAMA, HIROSHI OZAKI
  • Patent number: 10026770
    Abstract: Disclosed herein is a semiconductor device including: a first semiconductor chip having an electronic circuit section and a first connecting section formed on one surface thereof; a second semiconductor chip having a second connecting section formed on one surface thereof, the second semiconductor chip being mounted on the first semiconductor chip with the first and the second connecting sections connected to each other by a bump; a dam formed to fill a gap between the first and the second semiconductor chips on a part of an outer edge of the second semiconductor chip, the part of the outer edge being on a side of a region of formation of the electronic circuit section; and an underfill resin layer filled into the gap, protrusion of the resin layer from the outer edge of the second semiconductor chip to a side of the electronic circuit section being prevented by the dam.
    Type: Grant
    Filed: June 22, 2017
    Date of Patent: July 17, 2018
    Assignee: Sony Corporation
    Inventors: Satoru Wakiyama, Hiroshi Ozaki
  • Publication number: 20180166490
    Abstract: There is provided an imaging device including: a first semiconductor substrate (21) having a first region (22, R11) that includes a photoelectric conversion section (67) and a via portion (51), a second region (R12) adjacent to the first region, a connection portion (53, 84, 85) disposed at the second region, and a second semiconductor substrate (81), wherein the connection portion electrically couples the first semiconductor substrate to the second semiconductor substrate in a stacked configuration, and wherein a width of the connection portion is greater than a width of the via portion.
    Type: Application
    Filed: February 26, 2016
    Publication date: June 14, 2018
    Inventors: Satoru WAKIYAMA, Yukio TAGAWA